Ace Test Series: Digital Logic - Decoder

Question

A $3$ line to $8$ line Decoder is used to implement a $3$-variable Boolean function as shown in figure.

The simplified form of output $Y$ is.

• A. $\bar{X}Y + \bar{Y}Z + XY\bar{Z}$
• B. $\bar{X}Z +\bar{Y}Z + XYZ$
• C. $X\bar{Y} + X\bar{Z} +\bar{X}YZ$
• D. $X\bar{Y} + X\bar{Z} + \bar{X}Y\bar{Z}$

Comments

here ans is c if we are not applying bubble operation

simply considering when x'y'z' stands for 0 and so on and if we apply bubble operation we will get as ans output of c with complemented inputs

---

Her​e for a particular input combination, decoder shud give  exactly one output as '0'  rest all as '1'.

For eg -   for input  ZYX  =  0 0 0   

                output pin D0  will be  '0'   and other o/p pins will be '1' .

Answer 1

all bubble take ahead of OR gate that becomes NAND gate....

inputs to NAND gate are(1,3,5,6) which gives same output...using k-map...ans is C...

Comments

input to NAND gate is 1,3,5,6

output of NAND gate is 1,3,5,6

can you explain how both are same?

---

How it is giving the same output ?? can you explain a bit more.

Answer 2

HERE its written like this(Z is MSB) 

ZYX ....

NOW TAKE 0's outside and it will be NAND GATE now it says when enteries are either (1,3,5,6) we get 1

so fill 1 at those places and it will turn out to be Z'Y'X+Z'YX+ZY'X+ZYX' THAT MATCHES WITH c 

JUST MAKE THE OPTION C IN CANONICAL FORM

Comments

But, doesn't a NAND gate mean "Atleast 1 among (1,3,5,6) should be 0" so that it can output 1.. So how to draw a K-Map for it?? Can you plz post a diagram too? Thanx in davance :)

---

I agree with Tushar can u elaborate on this?

Answer 3

The output would be 1, which is not given in the options.

If C would be the option then the decoder would form an AND-OR/NAND-NAND structure.

which means, For the C option, (1,3,5,6) shall be max term which they(ACE) have missed out.