Problem of using formula- we must know what's the use of a page table. It is to get actual physical address. TLB is a quick look-up for page table.
Regarding question- it's a really well framed question like in GATE. Only issue is for me to read the small font.
So, memory access works like this - First look in cache and then go to RAM. But before looking in cache we need physical address- because cache uses physical address as given in question. (it can use virtual addressing or virtually index and physical tag also but this question is clear- physical index, physical tag).
Now what happens when a TLB miss happens? We look in page table which is in main memory. Can this page table be cached? Yes, quite often. So, determining the time becomes complex. But see the question- it directly gives the time during a TLB miss- so we are saved. Page walk just means looking up in page table.
If you haven't understood so far I suggest to better skip this portion for GATE. There is no use other than getting negative if you read below without understanding above.
Average memory access time = Avg. address translation time + Avg. data access time
$= \left(0.95 \times 1 + 0.05 \times (1+200)\right) + 0.95 \times 1 + 0.05 \times 0.80 \times (1 + 8 )+ 0.05 \times 0.2 \times 0.5 \times (1+8+50) + 0.05 \times 0.2 \times 0.5 \times (1+8+50+100)
\\= 11 + 0.95 + 0.36 + 0.295+0.795
\\=13.40 ns$