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NOR output of Q & R will take 2ns in this time period inverter will also give output so 2ns for input of first MUX..
after that output of MUX will take 1.5ns.. only after output of first MUX input for second MUX can be calculated.. now again NOR gate will take 2ns and parallely inverter will also give its output.. after input second MUX would again take 1.5 ns...
so total delay is 7..

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