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Recent questions tagged go-digital-logic-1

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GATE Overflow | Digital Logic | Test 1 | Question: 30
Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature? cross coupling gate impedance low input voltages asynchronous operation

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

134 views

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2 answers

2

GATE Overflow | Digital Logic | Test 1 | Question: 29
The minimum number of gates required to implement the Boolean function $(AB+C)$ if we have to use only 2-input NOR gate?

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

255 views

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2 answers

3

GATE Overflow | Digital Logic | Test 1 | Question: 28
Zero has only one representation in Sign magnitude 1's complement 2's complement Both 1's complement and 2's complement

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

286 views

3 votes

1 answer

4

GATE Overflow | Digital Logic | Test 1 | Question: 27
The number 3 in 2’s complement representation is 00000011 11111101 11111100 01111100

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

385 views

1 vote

2 answers

5

GATE Overflow | Digital Logic | Test 1 | Question: 26
Which of the following operations is commutative but not associative ? AND OR NAND EXOR

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

288 views

1 vote

3 answers

6

GATE Overflow | Digital Logic | Test 1 | Question: 25
All digital circuits can be realized using only Ex-OR gates AND, OR gates Half-adders OR gates

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

515 views

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1 answer

7

GATE Overflow | Digital Logic | Test 1 | Question: 24
What is minimum number of NAND gates required to implement a 2 input EX-OR gate without using any other logic gates?

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

155 views

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1 answer

8

GATE Overflow | Digital Logic | Test 1 | Question: 23
Determine the Radix $r$ $(BEE)_r = (2699)_{10}$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

487 views

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1 answer

9

GATE Overflow | Digital Logic | Test 1 | Question: 22
On the fifth clock pulse, a 4-bit Johnson sequence is $Q_0 = 0, Q_1 = 1, Q_2 = 1,$ and $Q_3 = 1$. On the sixth clock pulse, the sequence is ________. $Q_0 = 1, Q_1 = 0, Q_2 = 0, Q_3 = 0$ $Q_0 = 1, Q_1 = 1, Q_2 = 1, Q_3 = 0$ $Q_0 = 0, Q_1 = 0, Q_2 = 1, Q_3 = 1$ $Q_0 = 0, Q_1 = 0, Q_2 = 0, Q_3 = 1$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

144 views

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0 answers

10

GATE Overflow | Digital Logic | Test 1 | Question: 21
What is the final value stored in the linear feedback shift register if the input is 101101? $0110$ $1011$ $1101$ $1111$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

130 views

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1 answer

11

GATE Overflow | Digital Logic | Test 1 | Question: 20
The minimum number of $T$ –gates required to implement the following function is $F(w,x,y,z) = \sum m (0,1,2,4,7,8,9,10,12,15) $

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

204 views

1 vote

2 answers

12

GATE Overflow | Digital Logic | Test 1 | Question: 19
The Min-term expansion of $F(P,Q,R)= PQ+Q\bar R+P\bar R$ is $m_2 + m_4 + m_6 + m_7$ $ m_0 + m_1 + m_6 + m_7$ $m_0 + m_1 + m_3 + m_5$ $m_2 + m_3 + m_4 + m_5$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

222 views

0 votes

1 answer

13

GATE Overflow | Digital Logic | Test 1 | Question: 18
The conversion $(E7C.B)_{16}$ to octal is equal to $( 8483.9)_8$ $(6894.4)_8$ $(8124.5)_8$ $(7174.54)_8$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

297 views

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1 answer

14

GATE Overflow | Digital Logic | Test 1 | Question: 17
Which of the following is equivalent expression to $A \oplus B \oplus C$ : $(A+B+C)(\bar A+\bar B+\bar C ) $ $( A+B+C) (\bar A +\bar B +C)$ $ABC + \bar A(B \oplus C ) + \bar B (A \oplus C )$ None

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

347 views

1 vote

1 answer

15

GATE Overflow | Digital Logic | Test 1 | Question: 16
The output of a gated S-R flip-flop changes only if the: flip-flop is set control input data has changed flip-flop is reset input data has no change

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

508 views

2 votes

1 answer

16

GATE Overflow | Digital Logic | Test 1 | Question: 15
The addition of 4 bits two complement binary numbers $1101$ and $0100$ results in 0001 and an overflow 1001 and no overflow 0001 and no overflow 1001 and an overflow

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

418 views

0 votes

1 answer

17

GATE Overflow | Digital Logic | Test 1 | Question: 14
Find the complement of this expression $(A+\bar B+C) (\bar A\bar B + C) (A +\bar B\bar C )$ $\bar AB\bar C + (A+B)\bar C + \bar A(B+C)$ $A\bar B( C+B) + \bar AB + \bar CB(A+\bar B)$ $A\bar B( C+B) + \bar AC + \bar CA(C+\bar B)$ $AC\bar B + \bar AB + \bar C(A+\bar B)$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

213 views

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1 answer

18

GATE Overflow | Digital Logic | Test 1 | Question: 13
$(1217)_8$ is equivalent to $(1217)_{16}$ $(028F)_{16}$ $(2297)_{10}$ $(0B17)_{16}$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

138 views

0 votes

1 answer

19

GATE Overflow | Digital Logic | Test 1 | Question: 12
In 2's complement addition, Overflow is flagged whenever there is carry from sign bit addition can not occur when a positive value is added to a negative value is flagged when the carries from sign bit and previous bit match none of the above

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

389 views

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1 answer

20

GATE Overflow | Digital Logic | Test 1 | Question: 11
A processor that has carry, overflow and sign flag bits as part of it’s program status word , performs addition of two 2’s complement numbers 01001101 and 11101001. After the execution of this addition operation the status of the carry, overflow, zero and sign flags will be : 1, 1, 0, 0 1, 0, 1, 0 0, 1, 0, 0 1, 0, 0, 0

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

153 views

0 votes

1 answer

21

GATE Overflow | Digital Logic | Test 1 | Question: 10
Total number of full and half-adders require to add 32 bit numbers is 16 half adders , 16 full adders 1 half-adders , 31 full-adders 32 half-adders, 0 full-adders 16 half-adders, 31 full-adders

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

372 views

0 votes

3 answers

22

GATE Overflow | Digital Logic | Test 1 | Question: 9
Reduce this Boolean Expression to one literal $\bar W X( \bar Z +\bar YZ ) + X( W+\bar WYZ)$ $W$ $Z$ $X$ $Y$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

387 views

1 vote

2 answers

23

GATE Overflow | Digital Logic | Test 1 | Question: 8
Which of the following sets of components are sufficient to implement any arbitrary Boolean function (assume external 0/1 is available): XOR gates, NOT gates 2 to 1 multiplexors AND gates, OR gates Three input gates that output $(A.B) + C$ where $A,B,C$ are inputs

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

380 views

1 vote

2 answers

24

GATE Overflow | Digital Logic | Test 1 | Question: 7
The following expression was to be realized using 2-input AND and OR gates, but by mistake all 2-input AND gates were taken as 2-input NAND gates, $(a.b).c + (\bar a.c).d + (\bar b.c).d + a.d$ What is the function finally realized ? $1$ $\bar a + \bar b + \bar c + \bar d$ $\bar a + b + \bar c + \bar d$ $\bar a + \bar b + c + \bar d$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

649 views

1 vote

3 answers

25

GATE Overflow | Digital Logic | Test 1 | Question: 6
The minimum number of Flip-Flops required to construct a binary Modulo $n$ counter is ________ $n$ $n-1$ $2^n – 1$ $\lceil \log_2 n \rceil$

Bikram asked in Digital Logic Sep 20, 2016

by Bikram

844 views

2 votes

2 answers

26

GATE Overflow | Digital Logic | Test 1 | Question: 5
Which function does not implement the Karnaugh Map given below? wz 00 01 11 10 xy 00 0 x 0 0 01 0 x 1 1 11 1 1 1 1 10 0 x 0 0 $(w+x)y$ $xy + yw$ $(w+x) (\bar w + y) (\bar x + y)$ All of the above implement the given Karnaugh Map

Bikram asked in Digital Logic Sep 19, 2016

by Bikram

660 views

1 vote

2 answers

27

GATE Overflow | Digital Logic | Test 1 | Question: 4
A set of Boolean connectives is known as functionally complete if all Boolean functions can be Synthesized using those. Which of the following sets of connectives is not functionally complete ? EX-NOR implication, negation OR, negation NAND

Bikram asked in Digital Logic Sep 19, 2016

by Bikram

513 views

2 votes

1 answer

28

GATE Overflow | Digital Logic | Test 1 | Question: 3
The advantage of Synchronous Sequential circuits over Asynchronous Sequential circuits is : Faster operation Easy to avoid problems due to Hazards Lower hardware requirement None

Bikram asked in Digital Logic Sep 19, 2016

by Bikram

826 views

0 votes

1 answer

29

GATE Overflow | Digital Logic | Test 1 | Question: 2
Find the minimum sum of products form of the below Logic function : $F(A,B,C,D) = \sum m(0,2,8,10,15) + \sum d(3,11,12,14)$ where $m$ and $d$ are min-terms and don’t care conditions respectively. $AC +\bar BC \bar D +B\bar C $ $\bar B \bar D + AC$ $\bar AC +BC+\bar B\bar C \bar D$ $B\bar C\bar D + \bar BA + CA$

Bikram asked in Digital Logic Sep 19, 2016

by Bikram

254 views

0 votes

1 answer

30

GATE Overflow | Digital Logic | Test 1 | Question: 1
A sequential circuit has three D flip-flops $A, B, C$ and one input $X$. The circuit is described by the following input equations: $D_A = (B\bar C + \bar BC ) X + (BC + \bar B \bar C) \bar X , \\D_B = A , \\D_C = B$ What is the next state for the circuit for $X=0$ when present state $A, B ,C$ is $0, 0, 0$? 0 1 0 1 0 0 0 0 0 0 0 1

Bikram asked in Digital Logic Sep 19, 2016

by Bikram

438 views

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Recent questions tagged go-digital-logic-1