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MadeEasy Full Length Test 2019: Digital Logic - Shift Registers
raahul
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Jan 17, 2019
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Please answer??
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raahul
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BASANT KUMAR
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Aug 1, 2019
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i think it's just addition of four bit number .in each clock cycle 1 bit will be computed for 2 clock cycle 2 bit will be computed the output will be s=1,c=1.correct me if i am wrong.
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