in CO and Architecture
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in CO and Architecture
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we can Reduce Compulsory Misses with Pre-fetch Techniques
e.g. Stream Buffers : A stream buffer consists of a series of entries, each consisting of a tag, an available bit, and a data line
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we can reduce compulsory miss by using concept of prepaging opposite of demand paging.

conflict and capacity miss wee can reduce by increasing size of memory.
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I think compulsory miss could be reduced by putting the data initially in the cache.

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then what it will be . we may put irrelevant data in cache  ?
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what about simply increasing the cache line (block) size? Can it reduce compulsory misses?
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But it will increase miss penalty
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@Arjun sir
Sir, it will decrease compulsory miss if data is already inside the cache (some valid data), otherwise of no use for compulsory conflict.
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