in CO and Architecture
373 views
2 votes
2 votes
I have few doubts regarding $ L1$ and $ L2 $ cache

Consider there is sequential access to L1 and L2 cache i.e L2 is accessed after L1 misses

$\textup{Doubt 1:}$
Suppose we want to read data and data is not present in both $ L1$ and $ L2 $ then during reading that block, is it copied to both $ L1$ and $ L2 $ or only to  $ L1$? Please explain w.r.t  $\textup{write back}$ and $\textup{write through}$?

 
$\textup{Doubt 2:}$
Suppose we need to write data and $ L1$ gets write miss and $ L2$ has write hit. Now consider we are using $\textup{write through}$ so data gets updated in memory but does the data brought in $ L1$ cache also?

Considering the same scenario what happens if we use  $\textup{write back}$ policy?

 
$\textup{Doubt 3:}$
Suppose we want to perform write and we are using $\textup{write back}$ policy. Now consider that there is a write miss in both $ L1$ and $ L2 $ and we are using  $\textup{write allocate}$, so do we write data only to  $ L1$ or to both  $ L1$ and $ L2 $?

What happens if its said that both the cache are inclusive?
in CO and Architecture
373 views

1 comment

Q1: Is a read operation supposed to behave differently for a write-through/write-back cache? (assuming no block corresponding to a previous write operation is getting replaced)

In a write through cache whether the written data is brought to cache (write allocate) or not is “implementation dependent”. Sometimes it is beneficial and sometimes it is not. https://en.wikipedia.org/wiki/Cache_(computing)#Writing_policies

Most of the materials on cache will be using just one cache level and memory. You have mentioned both L1 and L2 and they are independent to follow their own cache read/write policies. 

1
1

1 Answer

0 votes
0 votes

In a typical computer system, the L1 and L2 caches are used to temporarily store data that is frequently used by the CPU. When the CPU needs to read or write data, it first checks the L1 cache for the data. If the data is not in the L1 cache (known as a cache miss), the CPU will then check the L2 cache. If the data is not in the L2 cache either, it will be read from or written to main memory.

  1. When a block of data is read from main memory and is not present in either the L1 or L2 cache, it will be copied to both the L1 and L2 caches in a system that uses a write-back policy. In a system that uses a write-through policy, the data will be written to both main memory and the L2 cache, but only the L2 cache will be updated with the new data.

  2. In the scenario where a write operation results in a write miss in L1 and a write hit in L2, the behavior will depend on whether the system uses a write-back or write-through policy. In a system with a write-back policy, the data will be updated in the L2 cache and marked as dirty (indicating that it has been modified and needs to be written back to main memory at some point), but it will not be written to main memory until the L2 cache block containing the data is evicted from the cache. In a system with a write-through policy, the data will be written to both main memory and the L2 cache.

  3. In a write-back cache with a write-allocate policy, a write miss in both L1 and L2 caches will result in the data being written to the L1 cache only. If the L1 and L2 caches are inclusive, the data will also be copied to the L2 cache. If the L1 and L2 caches are not inclusive, the data will not be copied to the L2 cache, and the next time the CPU tries to access the data, it will result in another cache miss and the data will be read from main memory again.

1 comment

In point 1. you have mentioned that if write through cache is used and there is read miss in both L1 and L2 then data will be copied to L2 only, but if this happens then there will be miss in L1 cache afterwards.

Can you provide any reference for this point

 

0
0

Related questions