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A computer has a $32$-bit address bus with a direct mapped cache, using $4$ bits for block offset, $16$ tag bits, and $12$ index bits.

Which of the following address pairs can be placed in the cache simultaneously?

  1. $\textsf{3AC6 F45 6}$ and $\textsf{26A3 545 6}$
  2. $\textsf{3F08 C30 4}$ and $\textsf{3F08 C37 1}$
  3. $\textsf{5E3C 768 0}$ and $\textsf{8F3C 768 A}$
  4. $\textsf{2233 445 5}$ and $\textsf{2233 445 C}$
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All India Mock Test 3 - Solutions Part 2

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In options A and B, we have different tag and index values and hence they will be mapped to different cache lines ---> they can be present in the cache simultaneously.

For option D, tag and index bits are exactly the same, only offset bits are different and hence these addresses are of the same block!

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What does it mean by

Having Same Tag part and Different Tag part for two addresses if nothing else is given.

What does this Tag part represent? @GO Classes 

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Actually the question is asking for simultaneous transfer of the given address from main memory to cache.So simultaneous transfer is possible only for 2 cases-

1-Given address are present in same block(means same tag and same cache index)->matches option D

2-Given address are present in 2 different blocks who are never going to be placed in same cache index(means different index no)->matches option A and B.
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