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Recent questions tagged control-unit

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Control Unit
Design a vertical micro programmed control unit to generate 40 signals. Out of first 35 those only 3 signals can be active at a time. And remaining 5, anyone can be active anytime. The micro instruction of the control unit stores control signal information along with 3-bit MUX select and 12 bits address field. The size of the control memory required is?

arnabjana09 asked in CO and Architecture Jan 11

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Control Unit
Consider a microprogrammed control unit has to support 32 number of instructions. For each instruction execution control unit generate a sequence of 64 control words. Each micro instruction contains 3 fields: 118 control signals to support horizontal control unit, a MUX select field to select one of 8 inputs, and a next address field. The size of control memory needed is?

arnabjana09 asked in CO and Architecture Jan 11

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Made Easy Test Series 2024
Consider a CPU where all the instructions require 8 clock cycles to complete execution. There are 220 instructions in the instruction set. It is found that 239 control signals are needed to be generated by the control unit. While designing the ... bits) Can anyone please explain the concept used here I studied the control unit but I am not getting this question

Ray Tomlinson asked in CO and Architecture Sep 6, 2023

by Ray Tomlinson

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1 answer

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Computer Organization and architecture
Consider a hypothetical processor which supports expand opcode technique. A 32 bit instruction is place in 256MW memory. If there exist 10, one address instruction then how many zero-address instruction are possible.

iabhay.gupta asked in CO and Architecture Dec 11, 2022

by iabhay.gupta

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control signal
28 control signal to each micro operation has 2 control signal active at a time. Find minimum no. of bits need for control field.

someshawasthi asked in CO and Architecture Oct 27, 2022

by someshawasthi

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control signal
What will be the control signal for executing the 32-bit instruction PC=PC+4? Explain each of the steps in single sentence.

Abhi patil asked in CO and Architecture Sep 12, 2022

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Computer organization and architecture
1. In memory hierarchy the fattest memory type is cache memory next to register. So describe mapping process(transformation data from memory to cache memory)

kidussss asked in CO and Architecture Sep 1, 2022

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Computer organization and architecture
1. Assume to transfer serial data we use shift register. So if we need to transfer 8 bit data to 8 bit shifter register: a) Show the content of shift register after 2 bit transferred using diagram? b) Show the overall serial transfer of all data using diagram. c) Determine how many shifting is performed to transfer all data?

kidussss asked in CO and Architecture Sep 1, 2022

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Best Open Video Playlist for Control unit Topic | CO & A
Please list out the best free available video playlist for Control unit from CO & A as an answer here (only one playlist per answer). We'll then select the best playlist and add to GO classroom video lists. You can add ... ) but standard ones are more likely to be selected as best. For the full list of selected videos please see here

makhdoom ghaya asked in Study Resources Aug 16, 2022

by makhdoom ghaya

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computer organization
Is non-linear pipe lining in gate 2022???

ramraj13 asked in CO and Architecture Jan 20, 2022

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MADE-EASY Full Length Test
Options were: 823 55 223 31 Please give detailed solution.

Sagar475 asked in CO and Architecture Jan 18, 2022

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William Stallings - Computer Organization and Architecture D
A computer system contains a main memory of 32KB. It also has a 4KB cache divided into four-lines/set with 64B per line. Assume that the cache is initially empty. The processor fetches words from locations 0, 1, 2, . . . ... from the use of the cache. Assume an LRU policy for block replacement. Show the state of cache at the end.

lucifer069 asked in CO and Architecture Sep 15, 2021

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William Stallings - Computer Organization and Architecture D
Consider the following assembly code: Instruction Description LD R1, 45(R2) Read data from memory and store in R1. Memory address is calculated by adding 45 to the content of R2 ADD R7, R1, R5 Add contents of R1 ... Calculate the execution time and compare time that would have required in a non-pipelined processor to run the same program.

lucifer069 asked in CO and Architecture Sep 15, 2021

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Structure of control word in control memory
What is the structure of control word for Horizantal microprogrammed control unit? <Conditional branch bit, flag bits, contol field, next address> OR <log(Conditional branch bits), log(flag bits), contol field, next address>

jaswanth431 asked in CO and Architecture Sep 7, 2021

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1 vote

1 answer

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UGC NET CSE | October 2020 | Part 2 | Question: 81
Given below are two statements: Statement $I$: Hardwired control unit can be optimized to produce fast mode of operation Statement $II$: Indirect addressing mode needs two memory reference to fetch operand In the light of the above statements, ... $I$ is correct but Statement $II$ is false Statement $I$ is incorrect but Statement $II$ is true

go_editor asked in CO and Architecture Nov 20, 2020

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NIELIT 2017 OCT Scientific Assistant A (CS) - Section B: 25
A micro programmed control unit Is faster than a hardwired unit Facilitates easy implementation of a new instruction Is useful when small programs are to be run All of the above

admin asked in CO and Architecture Apr 1, 2020

by admin

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5 answers

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UGC NET CSE | January 2017 | Part 3 | Question: 3
The general configuration of the microprogrammed control unit is given below: What are blocks B and C in the diagram respectively? Block address register and cache memory Control address register and control memory Branch register and cache memory Control address register and random access memory

go_editor asked in CO and Architecture Mar 24, 2020

1.6k views

2 votes

3 answers

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ISRO2020-2
Statements associated with registers of a CPU are given. Identify the false statement. The program counter holds the memory address of the instruction in execution Only opcode is transferred to the control unit An instruction in the instruction register consists of the ... The value of the program counter is incremented by $1$ once its value has been read to the memory address register

Satbir asked in CO and Architecture Jan 13, 2020

by Satbir

3.8k views

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1 answer

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Microprogrammed control unit
Can anyone explain microprogrammed control unit? Also what is horizontal microcode and vertical microcode?

Alina asked in CO and Architecture Dec 31, 2018

by Alina

368 views

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made easy 2019
A hypothetical control unit supports 5 groups of mutually exclusive signals. what is the size of control memory in bytes if during any microinstruction atmost 1 control signal is active and the control unit supports 256 control word memory

Gate Fever asked in CO and Architecture Dec 22, 2018

1.3k views

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2 answers

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Zeal Test Series 2019: CO & Architecture - Control Unit
what is 10x and 5x ?

Prince Sindhiya asked in CO and Architecture Dec 8, 2018

by Prince Sindhiya

685 views

2 votes

1 answer

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Gateforum Test Series: CO & Architecture - Control Unit

Gupta731 asked in CO and Architecture Nov 2, 2018

387 views

2 votes

2 answers

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william stallings computer organization control unit
Assume that the control memory is 24 bits wide. The control portion of the microinstruction format is divided into two fields.A micro-operation field of 11 bits specifies the micro-operations to be performed. An address selection field specifies a ... b. How many bits are in the address field? c. What is the maximum size of the control memory?

mauro5991 asked in CO and Architecture Aug 2, 2018

2.6k views

2 votes

2 answers

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Vertical Micro program
A vertical microprogrammed control unit supports 512 instructions. The system is using 8 conditional flags and contains 31 control signals. Each instruction on an average required 1 μ operation. The approximate size of control memory is ________ in bytes.

Na462 asked in CO and Architecture Jul 27, 2018

by Na462

2.1k views

1 vote

0 answers

25

Micro Instructions
Consider the following statements: S1 : Microprogrammed control unit uses fixed logic to interrupt instruction. S2 : Horizontal microprogramming control unit requires an additional hardware (like a decoder) S3 : The overall performance of a system is directly proportional to ... by the cache. Which of the following options is correct? Ans. Only S3. Brief reason is appreciated :)

Na462 asked in CO and Architecture Jul 27, 2018

by Na462

769 views

5 votes

2 answers

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Micro programmed Control Unit
Microprogrammed control unit uses fixed logic to interrupt instruction. True or False.

Shubhanshu asked in CO and Architecture Jan 7, 2018

2.7k views

2 votes

0 answers

27

Microprogrammed control unit
What is the difference between control signal and control word? Also, the difference between micro-operation and microinstruction.

Injila asked in CO and Architecture Dec 29, 2017

by Injila

930 views

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Recent questions tagged control-unit