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Recent questions tagged interrupts

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31

MadeEasyTestSeries
Consider a system employing interrupt driven IO for a particular device that transfer data at a rate of 8KB/sec continuously. Consider interrupt processing time about 100 microsec. The fraction of processor time consumed by this IO if interrupt occurs on every byte is ______?

dharmesh7 asked in CO and Architecture Jan 25, 2019

349 views

4 votes

1 answer

32

Applied Course | Mock GATE | Test 1 | Question: 62
Consider a $32$ bit, $10$ MIPS processor with an interrupt driven interface. Suppose a hard disk has a $16$ bit data bus and is connected to the processor and its transfer rate is $50 \:KB$ per second. ... instructions per second) $256000$ instructions per second $512000$ instructions per second $1024000$ instructions per second None of the above

Applied Course asked in CO and Architecture Jan 16, 2019

by Applied Course

734 views

2 votes

1 answer

33

Interrupt Service Routing ( Applied course Mock 3)
Consider a process P1 that is executing on a Linux-like OS on a single core system. When P1 is executing, a disk interrupt occurs, causing P1 to go to kernel mode to service that interrupt. The interrupt delivers all the disk blocks that unblock ... is ready P1 is ready and P2 is running P1 is running and P2 is ready P1 is blocked and P2 is ready

Mk Utkarsh asked in Operating System Jan 14, 2019

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34

UPPCL AE 2018:19
Consider the following statements regarding interrupts. If a process is interrupted during system call handling then the $\text{OS}$ will crash. If a process is interrupted during system call handling then the process is moved to the $\text{READY}$ queue. If an interrupt handler is ... of the above $\text{III}$ only $\text{II}$ and $\text{III}$ $\text{I}$ and $\text{III}$

admin asked in Operating System Jan 5, 2019

by admin

240 views

1 vote

2 answers

35

DMA,interrupts
True/false 1. To access bus the DMA does not issue an interrupt it is done through DMA-request and DMA-acknowledge wires. Interrupt is issued by DMA to CPU only after complete data is transferred to the specific memory address by DMA. 2. DMA interrupts the CPU whenever it needs to initiate I/O and also when it has finished I/O transfers.

Gurdeep Saini asked in CO and Architecture Jan 4, 2019

by Gurdeep Saini

1.0k views

1 vote

0 answers

36

SelfDoubtCOA1
A processor needs Software interrupt to obtain system service which need execution of privileged instruction. can u plz explain the term and need of Software interrupt.

Abhisek Tiwari 4 asked in CO and Architecture Dec 30, 2018

by Abhisek Tiwari 4

255 views

0 votes

1 answer

37

Computer Organization
What is a TRAP instruction and how it is used?

Leelakrishna Akhil asked in CO and Architecture Dec 10, 2018

by Leelakrishna Akhil

453 views

0 votes

0 answers

38

Made easy CO
Here is my approach, transmission time for 1 B -> 1/16kB =1000/16 =62.5micro sec now the processor is 50 micro sec Now since it is interrupted for every Byte, then consider one Byte Transfer- processor time consumed should be - 50/(50+62.5) =0.44 44.44% please tell me where I m wrong,

garimanand asked in CO and Architecture Nov 18, 2018

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39

made easy test series
Answer is 12.5.

amitqy asked in CO and Architecture Nov 2, 2018

by amitqy

272 views

1 vote

1 answer

40

I/O-COA
I think percentage of processor time consumed should be $\frac{ \,ISR\,time}{ISR\,time+\,Data\,Transfer\,Time}=\frac{100}{100+122}$. Is it correct?

Ayush Upadhyaya asked in CO and Architecture Oct 30, 2018

by Ayush Upadhyaya

1.2k views

1 vote

0 answers

41

Vectored or non vectored Interrupt
In this state diagram of interrupt, where interrupt service routine is used? Why both hardware and software control are needed to service an interrupt? PC,PSW and ISR how it execute one after another, I just getting problem which is the order of coming these to process interrupt and why?(Any easy discussion on this)

srestha asked in Operating System Oct 27, 2018

2.7k views

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0 answers

42

TANCET 2017 INTERRUPT

Balaji Jegan asked in CO and Architecture Oct 23, 2018

by Balaji Jegan

171 views

0 votes

1 answer

43

TANCET 2016 Interrupt

Balaji Jegan asked in CO and Architecture Oct 23, 2018

by Balaji Jegan

172 views

2 votes

2 answers

44

Non Vectored Interrupt

Na462 asked in CO and Architecture Oct 21, 2018

by Na462

1.7k views

0 votes

1 answer

45

#Interrupts #OS Doubt.
When an interrupt occurs, an operating system can ignore the interrupt? Please tell the answer with reasoning? Thank you!

iarnav asked in Operating System Oct 12, 2018

by iarnav

518 views

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46

Gate questions
https://gateoverflow.in/1657/gate1998-1-20 https://gateoverflow.in/1300/gate2009-8-ugcnet-june2012-iii-58 The answer assumes execution means the execute phase in a pipelined system while in the other answer, execution means the execution of an entire instruction. How ... assume what? Option C is considered as wrong in the first link while it is the correct answer in the second link.

gauravkc asked in CO and Architecture Sep 30, 2018

375 views

1 vote

1 answer

47

Na462 asked in CO and Architecture Sep 24, 2018

by Na462

828 views

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48

Interrupt handling
Give an example each for a hardware interrupt, an explicit software interrupt, and an implicit software interrupt, and discuss the possible operations as part of the interrupt handler.

dd asked in Operating System Sep 13, 2018

by dd

410 views

4 votes

1 answer

49

I/O operation
Please Explain Every Point :) Ans. All are Correct

Na462 asked in CO and Architecture Aug 13, 2018

by Na462

1.9k views

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0 answers

50

Interrupt
1)What is difference between internal interrupt and software interrupt? 2) What is difference between external interrupt and hardware interrupt?

srestha asked in Operating System Jul 26, 2018

711 views

3 votes

5 answers

51

MadeEasy Test Series: CO & Architecture - Io Handling
Consider a system employing interrupt driven I/O for a particular device that transfer data at an average of 8 KB/sec on a continuous basis. Consider interrupt processing takes about 100 μsec i.e. time to jump to ISR, execute it and return ... if interrupts occur for every byte is ________. [Assume 1 K = 1024] (Upto 2 decimal places) Ans. 0.81

Na462 asked in CO and Architecture Jul 25, 2018

by Na462

2.4k views

0 votes

4 answers

52

UGC NET CSE | July 2018 | Part 2 | Question: 97
Match the items in $\textbf{List-I}$ and $\textbf{List-II}$ ... $\text{(a)-(iii), (b)-(i), (c)-(ii)}$ $\text{(a)-(iii), (b)-(iv), (c)-(ii)}$

Pooja Khatri asked in CO and Architecture Jul 13, 2018

by Pooja Khatri

2.6k views

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53

Vectored Interrupts
Are Vectored Interrupts possible in CPU having single Interrupt Request line? How/Why not?

Harsh Kumar asked in CO and Architecture Jun 2, 2018

503 views

23 votes

4 answers

54

GATE CSE 2018 | Question: 9
The following are some events that occur after a device controller issues an interrupt while process $L$ is under execution. P. The processor pushes the process status of $L$ onto the control stack Q. The processor finishes the execution of the ... based on the interrupt Which of the following is the correct order in which the events above occur? QPTRS PTRSQ TRPQS QTPRS

gatecse asked in Operating System Feb 14, 2018

10.4k views

2 votes

2 answers

55

Gateforum Tests
Can anybody explain in brief how to solve such numericals.

vishal chugh asked in CO and Architecture Jan 15, 2018

by vishal chugh

694 views

1 vote

1 answer

56

vishal chugh asked in CO and Architecture Jan 13, 2018

by vishal chugh

343 views

3 votes

1 answer

57

Address after Halt instruction
Consider that the memory is byte addressable with size 16 bits, and the program has been loaded starting from memory location (2000)10. What will be the return address saved in the stack, if an interrupt occurs while the CPU has been halted after executing the HALT instruction? I am getting 2018.

Shubhanshu asked in CO and Architecture Jan 2, 2018

2.1k views

1 vote

2 answers

58

Interrupts
In case of Vectored interrupts,the I/o device send the vector address along with the I/o request or does it sends after it receives ack/INTA from CPU?

rahul sharma 5 asked in Operating System Dec 10, 2017

by rahul sharma 5

394 views

0 votes

1 answer

59

Operating system:- Interrupts
when the interrupt occurs ,then a: process switching may be there b: context saving must be there c: both a and b d.None of these

rahul sharma 5 asked in Operating System Dec 7, 2017

by rahul sharma 5

1.7k views

1 vote

1 answer

60

memory address saved on stack after interrupt
Consider that the memory is byte addressable with size 16 bits, and the program has been loaded starting from memory location (2000)10. What will be the return address saved in the stack, if an interrupt occurs while the CPU has been halted after executing the HALT instruction?

Tuhin Dutta asked in CO and Architecture Dec 2, 2017

2.9k views

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Recent questions tagged interrupts