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Recent questions tagged sequential-circuit
2
votes
1
answer
61
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 16
Consider the $JK$ Flip flop made using NAND gates given below What is the characteristic equation of $JK$ Flip flop ? ( $Q$ represents the present state and $Q_{n}$ represents the next state of the flip flop) $Q_{n}=\overline{J} Q+K Q$ ... $Q_{n}=J Q+\overline{K} Q$ $Q_{n}=\overline{J} Q+K \overline{Q}$
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GO Classes
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digital-logic
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3
votes
1
answer
62
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 20
Consider the following circuit : If $A n, B n$ denote the next state corresponding to current states $A, B$ ... of states in the state transition diagram of this circuit that have a transition back to the same state is $2 .$
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GO Classes
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goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
flip-flop
multiple-selects
2-marks
2
votes
1
answer
63
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 21
Consider the sequential circuit shown in the figure, where both flip-flops $\text{FD A}$ and $\text{FD B}$ used are positive edge-triggered $D$ flip-flops. The state of this circuit is represented by $(AB).$ This circuit is a $2$-bit complex ... $2.$ Number of PI for $D_{A}$ is $2$ and Number of EPI for $D_{B}$ is $3.$
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Digital Logic
Jun 2, 2022
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GO Classes
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goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
synchronous-asynchronous-circuits
flip-flop
digital-counter
2-marks
2
votes
1
answer
64
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 22
Consider the sequential circuit shown in the figure, where both flip-flops $\text{FD A}$ and $\text{FD B}$ used are positive edge-triggered $D$ flip-flops. The state of this circuit is represented by $(AB).$ This circuit is a ... when $x=1$. It works as a down counter when $x=1$ and works as a johnson counter when $x=0$.
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in
Digital Logic
Jun 2, 2022
by
GO Classes
211
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goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
synchronous-asynchronous-circuits
flip-flop
digital-counter
2-marks
1
vote
1
answer
65
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 23
Consider the following circuit. What are the values of $P, Q, R$ after two cycles if $P=0, Q=1$ and $R=0$ to begin with? $011$ $101$ $100$ $111$
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Digital Logic
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GO Classes
148
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goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
synchronous-asynchronous-circuits
flip-flop
digital-counter
2-marks
2
votes
1
answer
66
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 25
Consider the following circuit. $10011000010$ is supplied to the "data" terminal in $11$ clock cycles. After that the values of $q_2 q_1 q_0$ are $000$ $010$ $101$ $111$
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in
Digital Logic
Jun 2, 2022
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GO Classes
254
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goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
synchronous-asynchronous-circuits
flip-flop
digital-counter
2-marks
11
votes
3
answers
67
GATE CSE 2021 Set 1 | Question: 28
Consider a $3$-bit counter, designed using $T$ flip-flops, as shown below: Assuming the initial state of the counter given by $\text{PQR}$ as $000$, what are the next three states? $011,101,000$ $001,010,111$ $011,101,111$ $001,010,000$
Arjun
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Digital Logic
Feb 18, 2021
by
Arjun
7.1k
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gatecse-2021-set1
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2-marks
1
vote
1
answer
68
NIELIT Scientific Assistant A 2020 November: 85
Which flip-flop is used to make all types of shift registers? JK flip-flop D flip-flop T flip-flop All the options
gatecse
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in
Digital Logic
Dec 9, 2020
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gatecse
533
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nielit-sta-2020
digital-logic
sequential-circuit
flip-flop
0
votes
4
answers
69
NIELIT 2017 OCT Scientific Assistant A (IT) - Section D: 10
A $4$ bit ripple counter and a $4$ bit synchronous counter are made using flip-flops having a propagation delay of $10$ ns each. If the worst case delay in the ripple counter and the synchronous counter be $R$ and $S$ respectively, then $R = 10$ ns, $S = 40$ ns $R = 40$ ns, $S = 10$ ns $R = 10$ ns, $S = 30$ ns $R = 30$ ns, $S = 10$ ns
admin
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in
Digital Logic
Aug 28, 2020
by
admin
937
views
nielit2017oct-assistanta-it
digital-logic
sequential-circuit
flip-flop
digital-counter
0
votes
3
answers
70
NIELIT 2017 OCT Scientific Assistant A (CS) - Section D: 9
A sequential circuit using D flip-flop and logic gates is shown in Figure, where $X$ and $Y$ are the inputs and $Z$ is the output. The circuit is $\text{S-R}$ Flip-flop with inputs $X = R$ and $Y=S$ $\text{S-R}$ ... $X = J$ and $Y=K$ $\text{J-K}$ Flip-flop with inputs $X = K$ and $Y=J$
admin
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Digital Logic
Aug 28, 2020
by
admin
2.0k
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nielit2017oct-assistanta-cs
digital-logic
sequential-circuit
flip-flop
1
vote
2
answers
71
NIELIT 2017 OCT Scientific Assistant A (CS) - Section D: 10
A $4$ bit ripple counter and a $4$ bit synchronous counter are made using flip-flops having a propagation delay of $10$ ns each. If the worst case delay in the ripple counter and the synchronous counter be $R$ and $S$ respectively, then $R = 10$ ns, $S = 40$ ns $R = 40$ ns, $S = 10$ ns $R = 10$ ns, $S = 30$ ns $R = 30$ ns, $S = 10$ ns
admin
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Digital Logic
Aug 28, 2020
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admin
949
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nielit2017oct-assistanta-cs
digital-logic
sequential-circuit
flip-flop
digital-counter
2
votes
1
answer
72
NIELIT 2016 MAR Scientist C - Section C: 37
A sequential circuit outputs a $\text{ONE}$ when an even number$(>0)$ of one’s are input; otherwise the output is $\text{ZERO}.$ The minimum number of states required is $0$ $1$ $2$ $3$
admin
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in
Digital Logic
Apr 2, 2020
by
admin
1.2k
views
nielit2016mar-scientistc
digital-logic
sequential-circuit
1
vote
3
answers
73
NIELIT 2016 MAR Scientist C - Section C: 39
If a clock with time period $“T”$ is used with $n$ stage shift register, then output of final stage will be delayed by $nT$ sec $(n-1)T$ sec $n/T$ sec $(2n-1)T$ sec
admin
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in
Digital Logic
Apr 2, 2020
by
admin
1.3k
views
nielit2016mar-scientistc
digital-logic
sequential-circuit
0
votes
0
answers
74
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 19
In a ripple counter using edge-triggered $JK$ flip-flops, the pulse input is applied to Clock input of all flip-flops $J$ and $K$ input of one flip-flop $J$ and $K$ input of all flip-flops Clock input of one flip-flop
admin
asked
in
Digital Logic
Apr 1, 2020
by
admin
502
views
nielit2017oct-assistanta-it
digital-logic
sequential-circuit
flip-flop
1
vote
3
answers
75
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 33
The number of columns in a state table for a sequential circuit with $’m’$ flip flops and $’n’$ input is $m+n$ $m+2n$ $2m+n$ $2m+2n$
admin
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in
Digital Logic
Apr 1, 2020
by
admin
1.5k
views
nielit2017oct-assistanta-it
digital-logic
sequential-circuit
flip-flop
1
vote
2
answers
76
NIELIT 2017 OCT Scientific Assistant A (CS) - Section C: 8
In a ripple counter using edge-triggered $JK$ flip-flops, the pulse input is applied to Clock input of all flip-flops $J$ and $K$ input of one flip-flop $J$ and $K$ input of all flip flops Clock input of one flip-flop
admin
asked
in
Digital Logic
Apr 1, 2020
by
admin
686
views
nielit2017oct-assistanta-cs
digital-logic
sequential-circuit
flip-flop
3
votes
2
answers
77
NIELIT 2016 MAR Scientist B - Section C: 3
The output of a sequential circuit depends on present inputs only past inputs only both present and past inputs present outputs only
admin
asked
in
Digital Logic
Mar 31, 2020
by
admin
1.0k
views
nielit2016mar-scientistb
digital-logic
sequential-circuit
3
votes
1
answer
78
NIELIT 2016 MAR Scientist B - Section C: 4
In a ripple counter using edge triggered $JK$ flip-flops, the pulse input is applied to the clock input of all flip-flops clock input of one flip-flop $J$ and $K$ inputs of all flip-flops $J$ and $K$ inputs of one flip flop
admin
asked
in
Digital Logic
Mar 31, 2020
by
admin
2.5k
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nielit2016mar-scientistb
digital-logic
sequential-circuit
flip-flop
3
votes
2
answers
79
NIELIT 2016 DEC Scientist B (IT) - Section B: 35
What will be the final output of D flip-Flop if the input string is $0010011100$? $1$ $0$ Don’t Care None of the above
admin
asked
in
Digital Logic
Mar 31, 2020
by
admin
2.3k
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nielit2016dec-scientistb-it
digital-logic
sequential-circuit
flip-flop
2
votes
1
answer
80
NIELIT 2016 DEC Scientist B (CS) - Section B: 35
What will be the final output of D Flip-Flop, if the input string is $11010011$? $1$ $0$ Don’t Care None of the above
admin
asked
in
Digital Logic
Mar 31, 2020
by
admin
842
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nielit2016dec-scientistb-cs
digital-logic
sequential-circuit
4
votes
1
answer
81
ISRO2020-80
A new flipflop with inputs $X$ and $Y$ ... $(X\wedge \overline{Q })\vee (Y \wedge Q)$ $(X\wedge \overline{Q })\vee (\overline{Y } \wedge Q)$
Satbir
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in
Digital Logic
Jan 13, 2020
by
Satbir
2.8k
views
isro-2020
digital-logic
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