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Recent activity by jlimbasiya
8
answers
1
GATE CSE 2010 | Question: 48
A computer system has an $L1$ cache, an $L2$ cache, and a main memory unit connected as shown below. The block size in $L1$ cache is $4$ words. The block size in $L2$ cache is $16$ words. The memory access times are $2$ ... $L1$ cache. What is the time taken for this transfer? $2$ nanoseconds $20$ nanoseconds $22$ nanoseconds $88$ nanoseconds
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in
CO and Architecture
Jun 6, 2020
40.8k
views
gatecse-2010
co-and-architecture
cache-memory
normal
barc2017
6
answers
2
GATE IT 2007 | Question: 26
Consider $n$ jobs $J_1, J_2 \dots J_n$ such that job $J_i$ has execution time $t_i$ and a non-negative integer weight $w_i$ ... the jobs? Non-decreasing order of $t_i$ Non-increasing order of $w_i$ Non-increasing order of $w_it_i$ Non-increasing order of $w_i/t_i$
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Operating System
Jun 6, 2020
14.5k
views
gateit-2007
operating-system
process-scheduling
normal
5
answers
3
GATE CSE 2006 | Question: 23
$F$ is an $n\times n$ real matrix. $b$ is an $n\times 1$ real vector. Suppose there are two $n\times 1$ vectors, $u$ and $v$ such that, $u ≠ v$ and $Fu = b, Fv = b$. Which one of the following statements is false? Determinant of $F$ is zero. There are an infinite number of solutions to $Fx = b$ There is an $x≠0$ such that $Fx = 0$ $F$ must have two identical rows
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Linear Algebra
May 31, 2020
9.9k
views
gatecse-2006
linear-algebra
normal
matrix
3
answers
4
GATE CSE 1987 | Question: 1-xv
In a circular linked list organization, insertion of a record involves modification of One pointer. Two pointers. Multiple pointers. No pointer.
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in
DS
Mar 16, 2020
14.2k
views
gate1987
data-structures
linked-list
10
answers
5
GATE CSE 2020 | Question: 53
Consider a paging system that uses $1$-level page table residing in main memory and a $\textsf{TLB}$ for address translation. Each main memory access takes $100$ ns and $\textsf{TLB}$ lookup takes $20$ ns. Each page transfer to/from the disk ... $1$ decimal places) is ___________
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in
Operating System
Mar 13, 2020
45.1k
views
gatecse-2020
numerical-answers
operating-system
virtual-memory
2-marks
4
answers
6
GATE IT 2008 | Question: 50
Consider the C program below. What does it print? # include <stdio.h> # define swapl (a, b) tmp = a; a = b; b = tmp void swap2 ( int a, int b) { int tmp; tmp = a; a = b; b = tmp; } void swap3 (int*a, int*b) { int tmp; tmp = *a; *a = *b; *b ... (num1 > = num2) {swap3 (&num1, &num2);} printf ("%d, %d", num1, num2); } $5, 5$ $5, 4$ $4, 5$ $4, 4$
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in
Programming in C
Mar 13, 2020
10.5k
views
gateit-2008
programming
programming-in-c
easy
parameter-passing
9
answers
7
GATE CSE 2003 | Question: 62
In a permutation $a_1\ldots a_n$, of $n$ distinct integers, an inversion is a pair $(a_i, a_j)$ such that $i < j$ and $a_i > a_j.$ What would be the worst case time complexity of the Insertion Sort algorithm, if the inputs are restricted to permutations of $1. . . n$ with at most $n$ inversions? $\Theta(n^2)$ $\Theta(n\log n)$ $\Theta(n^{1.5})$ $\Theta(n)$
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Algorithms
Mar 11, 2020
19.6k
views
gatecse-2003
algorithms
sorting
normal
insertion-sort
0
answers
8
How good is Mtech course in IIIT Bangalore
Is the standard at IIIT Bangalore comparable to NIT calicut in terms of course work and placements.?
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in
IIITs
Mar 8, 2020
2.1k
views
general
admissions
1
answer
9
gate admission
What should i prefer for mtech? iiitb or iit hyd?
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in
IISc/IITs
Mar 8, 2020
863
views
admissions
iit
iiit
getting-to-iits
2
answers
10
Nit or IiitB
Is IIITB better than Nit trichy,warangal in terms of placement, academics course structure?
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in
NITs
Mar 8, 2020
4.3k
views
nit
mtech
iiitb
4
answers
11
GATE CSE 2020 | Question: 9
Consider the following statements. Symbol table is accessed only during lexical analysis and syntax analysis. Compilers for programming languages that support recursion necessarily need heap storage for memory allocation in the run-time environment. Errors violating the condition any ... the above statements is/are TRUE? I only I and III only Ⅱ only None of Ⅰ, Ⅱ and Ⅲ
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in
Compiler Design
Feb 21, 2020
14.4k
views
gatecse-2020
compiler-design
compilation-phases
runtime-environment
1-mark
3
answers
12
GATE CSE 2016 Set 2 | Question: GA-01
The man who is now Municipal Commissioner worked as ________________. the security guard at a university a security guard at the university a security guard at university the security guard at the university
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in
Verbal Aptitude
Jan 31, 2020
4.3k
views
gatecse-2016-set2
verbal-aptitude
english-grammar
normal
3
answers
13
Give me the formula for write back and write through ( avg access time ) in both parallel and serial
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in
CO and Architecture
Jan 25, 2020
14.2k
views
3
answers
14
Symbol table data structure modification
A symbol is a compile time data structure. In which of the following phase/s a symbol is modified ? Only semantic analysis None of these Only lexical analysis Lexical analysis and syntax analysis
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in
Compiler Design
Jan 16, 2020
3.7k
views
compiler-design
symbol-table
1
answer
15
How to calculate propogation delay for a synchronous counter ?
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in
Digital Logic
Jan 13, 2020
2.9k
views
1
answer
16
made easy test series
Consider F be a family of all subsets of set {1,2,3,.....100} that contain atleast 50 numbers,partially ordered with respect to containment.Then maximum size of chains in the poset (F,⊆) that cover F is
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Mathematical Logic
Jan 12, 2020
722
views
2
answers
17
Chip Select
Ans. C
answered
in
CO and Architecture
Jan 11, 2020
392
views
co-and-architecture
12
answers
18
GATE CSE 2007 | Question: 24
Suppose we uniformly and randomly select a permutation from the $20 !$ permutations of $1, 2, 3\ldots ,20.$ What is the probability that $2$ appears at an earlier position than any other even number in the selected permutation? $\left(\dfrac{1}{2} \right)$ $\left(\dfrac{1}{10}\right)$ $\left(\dfrac{9!}{20!}\right)$ None of these
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in
Probability
Jan 10, 2020
15.1k
views
gatecse-2007
probability
easy
uniform-distribution
7
answers
19
GATE CSE 2005 | Question: 83a
Statement for Linked Answer Questions 83a & 83b: Consider the following expression grammar. The semantic rules for expression evaluation are stated next to each grammar production. ... a reduce action It detects shift-reduce conflict, and resolves the conflict in favor of a reduce over a shift action
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in
Compiler Design
Jan 10, 2020
20.2k
views
gatecse-2005
compiler-design
parsing
difficult
1
answer
20
What will be the output from YACC?
E → number | E '+' E | E '×' E This grammar is fed to a YACC tool for parsing. What will be the output for expression 3×2+1? /* How to solve this? please explain*/
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Compiler Design
Jan 10, 2020
654
views
compiler-design
parsing
2
answers
21
ER to Table Conversion
Any Good Resource to study this topic ? Or Could anyone explain this topic to me ?
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in
Databases
Jan 10, 2020
1.4k
views
er-diagram
rdbms
databases
7
answers
22
GATE CSE 1997 | Question: 4.5
A binary search tree contains the value $1, 2, 3, 4, 5, 6, 7, 8$. The tree is traversed in pre-order and the values are printed out. Which of the following sequences is a valid output? $5 \ 3 \ 1 \ 2 \ 4 \ 7 \ 8 \ 6$ $5 \ 3 \ 1 \ 2 \ 6 \ 4 \ 8 \ 7$ $5 \ 3 \ 2 \ 4 \ 1 \ 6 \ 7 \ 8$ $5 \ 3 \ 1 \ 2 \ 4 \ 7 \ 6 \ 8$
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in
DS
Jan 8, 2020
37.3k
views
gate1997
data-structures
binary-search-tree
normal
7
answers
23
GATE CSE 2016 Set 2 | Question: 44
Consider the following languages. $L_{1} = \left\{\left\langle M \right\rangle \mid M \text{ takes at least 2016 steps on some input} \right\}$ ... not recursive $L_{1}, L_{2}$ are recursive and $L_{3}$ is not recursive $L_{1}, L_{2}, L_{3}$ are recursive
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in
Theory of Computation
Jan 7, 2020
33.5k
views
gatecse-2016-set2
theory-of-computation
recursive-and-recursively-enumerable-languages
1
answer
24
Michael Sipser exercise
For each of the following languages, give the minimum pumping length and justify your answer. 0001* 0*1* 001 ∪ 0* 1* 0*1$^+$0$^+$1* ∪ 10*1 (01)* ε 1*01*01* 10(11*0)*0 1011 Σ*
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in
Theory of Computation
Jan 7, 2020
7.9k
views
pumping-lemma
minimum-pumping-length
5
answers
25
GATE CSE 2005 | Question: 59
Consider the grammar: $E \rightarrow E + n \mid E \times n \mid n$ For a sentence $n + n \times n$, the handles in the right-sentential form of the reduction are: $n, E + n$ and $E + n \times n$ $n, E + n$ and $E + E \times n$ $n, n + n$ and $n + n \times n$ $n, E + n$ and $E \times n$
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in
Compiler Design
Jan 6, 2020
16.1k
views
gatecse-2005
compiler-design
grammar
normal
4
answers
26
GATE CSE 2014 Set 3 | Question: 34
Consider the basic block given below. a = b + c c = a + d d = b + c e = d - b a = e + b The minimum number of nodes and edges present in the DAG representation of the above basic block respectively are $6$ and $6$ $8$ and $10$ $9$ and $12$ $4$ and $4$
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in
Compiler Design
Jan 6, 2020
34.7k
views
gatecse-2014-set3
compiler-design
code-optimization
directed-acyclic-graph
normal
6
answers
27
GATE IT 2006 | Question: 21
Consider the following first order logic formula in which $R$ is a binary relation symbol. $∀x∀y (R(x, y) \implies R(y, x))$ The formula is satisfiable and valid satisfiable and so is its negation unsatisfiable but its negation is valid satisfiable but its negation is unsatisfiable
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in
Mathematical Logic
Jan 4, 2020
13.4k
views
gateit-2006
mathematical-logic
normal
first-order-logic
3
answers
28
difference between compulsory miss, conflict miss and capacity miss
I want to clearly understand the difference between compulsory miss, conflict miss and capacity miss what I understood is compulsory miss: when a block of main memory is trying to occupy fresh empty line of cache, it ... Because in associative mapping, no block of main memory tries to occupy already filled line. is this correct?
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in
CO and Architecture
Jan 3, 2020
18.5k
views
co-and-architecture
cache-memory
misses
1
answer
29
MadeEasy Test Series: Databases - Er Diagram
Identify total number of attributes in minimized relation ?
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in
Databases
Jan 3, 2020
659
views
relations
made-easy-test-series
databases
er-diagram
6
answers
30
GATE IT 2004 | Question: 51
The storage area of a disk has the innermost diameter of $10$ cm and outermost diameter of $20$ cm. The maximum storage density of the disk is $1400$ bits/cm. The disk rotates at a speed of $4200$ RPM. The main memory of a computer has $64$-bit word length ... from the disk, the percentage of memory cycles stolen for transferring one word is $0.5 \%$ $1 \%$ $5\%$ $10\%$
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in
CO and Architecture
Dec 27, 2019
20.9k
views
gateit-2004
co-and-architecture
dma
normal
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