Digital-Logic Flip-flop Counters
[closed]

POOJAN SHAH asked in Digital Logic Aug 24, 2017 closed Aug 25, 2017 by Tesla!

622 views

0 votes

closed with the note: Violation of community guidelines https://gateoverflow.in/blog/2113

Qn) Ripple counter with preset works as?

QN- 2) Construction of Decoder 4:16?

QN- 3) 4 JK Flip-flops with high input. The frequency at output?

digital-circuits
flip-flop
digital-counter
sequential

POOJAN SHAH asked in Digital Logic Aug 24, 2017 closed Aug 25, 2017 by Tesla!

by POOJAN SHAH

622 views

0 Comments

Please log in or register to add a comment.

0 Answers

← Previous Next →

← Previous in category Next in category →

Related questions

1 vote

1 answer

akb1115 asked in Digital Logic Nov 8, 2017

1,217 views

Flip flops
Consider the complemented circuit shown below: If the initial value of the output Q1 Q0 is 00, then the next three values of Q1 Q0 are:- 10,01,01,00 10,01,11,00 10,01,00,01 10,01,10,00 Doubt:- I am getting a sequence which is not matching with any of the option

akb1115 asked in Digital Logic Nov 8, 2017

by akb1115

1.2k views

digital-logic
flip-flop
digital-circuits
digital-counter
sequential

0 votes

1 answer

sunaina rawat asked in Digital Logic Dec 3, 2017

323 views

Counters
Is this statement true? Nonbinary counter means synchronous counter?

sunaina rawat asked in Digital Logic Dec 3, 2017

by sunaina rawat

323 views

digital-counter
digital-circuits
digital-logic
sequential

2 votes

0 answers

Manu Thakur asked in Digital Logic Dec 17, 2017

457 views

Digital Logic: Counters
Consider the following question: My explanation: A clock cycle time should be large enough that all flip-flops can come in a stable state before the next clock cycle starts. Suppose cycle 1 is just completed and cycle 2 is just about to start: 1. to ... on the following link, it is $\frac{1}{20ns}$. Can someone explain, please? https://gateoverflow.in/26442/gate1991_5-c

Manu Thakur asked in Digital Logic Dec 17, 2017

by Manu Thakur

457 views

digital-counter
digital-circuits
flip-flop

2 votes

0 answers

yg92 asked in Digital Logic Jan 22, 2017

4,545 views

Identify MOD of the Counter
Clock Q0 Q1 Q2 State 0 0 0 0 1 1 0 0 1 2 0 1 0 2 3 1 1 0 3 4 0 0 1 4 5 1 0 1 5 At clock t5 or lets say after 5 clock pulses Q0 and Q2 becomes 1 and through NAND gate they will become 0 and since preset ... connecting clock to the gate play any significance role? Doubt is similar to the one of the gate questions asked prviously : https://gateoverflow.in/1234/gate2007-36

yg92 asked in Digital Logic Jan 22, 2017

by yg92

4.5k views

digital-logic
digital-counter
flip-flop
sequential
combinational-circuit

Subscribe to GATE CSE 2024 Test Series

Subscribe to GO Classes for GATE CSE 2024

Quick search syntax

tags	tag:apple
author	user:martin
title	title:apple
content	content:apple
exclude	-tag:apple
force match	+apple
views	views:100
score	score:10
answers	answers:2
is accepted	isaccepted:true
is closed	isclosed:true

Subjects

All categories
General Aptitude (3.5k)
Engineering Mathematics (10.4k)
Digital Logic (3.6k)
Programming and DS (6.2k)
Algorithms (4.8k)
Theory of Computation (6.9k)
Compiler Design (2.5k)
Operating System (5.2k)
Databases (4.8k)
CO and Architecture (4.0k)
Computer Networks (4.9k)
Artificial Intelligence (79)
Machine Learning (48)
Data Mining and Warehousing (25)
Non GATE (1.4k)
Others (2.7k)
Admissions (684)
Exam Queries (1.6k)
Tier 1 Placement Questions (17)
Job Queries (80)
Projects (11)
Unknown Category (870)

64.3k questions

77.9k answers

244k comments

80.0k users

Recent Blog Comments

category ?
Hi @Arjun sir, I have obtained a score of 591 in ...
download here
Can you please tell about IIT-H mtech CSE self...
Please add your admission queries here:...

Send feedback
Rank Predictor
College Prediction
Useful Links
FAQ
Corrections
Discuss
Copyright
Request
Testimonials
Chat Logs
Chat
Badges
Search tips
Exam Category
Blog Category
Blog Tags
Privacy
Test Series
GATER
Refund Policy
Terms and Conditions
Contact Us

Developed by Chun

Digital-Logic Flip-flop Counters [closed]