virtual gate

Question

Answer 1

The longest delay would be $25 ns + 10 ns$, as this component has a feedback unit. 

So maximum clock frequency $=\frac{1}{35*10^{-9}}= 28.57 MHz=29 MHz$(approx)

https://www.techtud.com/doubt/maximum-clock-frequency-which-data-path-can-operate

Comments

what would be the delay if there was no feedback loop involved ?

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why only 35ns. should be taken?