GATE CSE 2020 | Question: 3

Question

Consider the following statements.

1. Daisy chaining is used to assign priorities in attending interrupts.
2. When a device raises a vectored interrupt, the CPU does polling to identify the source of interrupt.
3. In polling, the CPU periodically checks the status bits to know if any device needs its attention.
4. During DMA, both the CPU and DMA controller can be bus masters at the same time.

Which of the above statements is/are TRUE?

• A. Ⅰ and Ⅱ only
• B. Ⅰ and Ⅳ only
• C. Ⅰ and Ⅲ only
• D. Ⅲ only

Answer 1

Answer : C

I is true

• The daisy-chaining method of establishing priority consists of a serial connection of all devices that request an interrupt. The device with the highest priority is placed in the first position, followed by lower-priority devices up to the device with the lowest priority, which is placed last in the chain.

II. is false

• Vectored interrupts are achieved by assigning each interrupting device a unique code, typically four to eight bits in length. When a device interrupts, it sends its unique code over the data bus to the processor, telling the processor which interrupt service routine to execute.

III. is true 

• The process of periodically checking status bits to see if it is time for the next I/O operation, is called polling. Polling is the simplest way for an I/O device to communicate with the processor the processor. 

IV. is false 

• Since CPU release bus only after getting request from DMA and get after DMA release the BUS.

Comments

@Prashant. This question comes under which subject? CAO or OS?I have done OS but I am not able to solve this question from what i studied in OS.Does this question require COA knowledge?

---

It comes under COA . The topics are "Types of Interrupt" and "Data transfer in DMA".

Check out the below links:

https://nptel.ac.in/content/storage2/courses/108105057/Pdf/Lesson-15.pdf

https://nptel.ac.in/content/storage2/courses/108105057/Pdf/Lesson-16.pdf

https://www.elprocus.com/direct-memory-access-dma-in-computer-architecture/#:~:text=The%20term%20DMA%20stands%20for,minimal%20intervention%20from%20the%20processor.

---

Good reference to understand Daisy chaining:

https://www.geeksforgeeks.org/priority-interrupts-sw-polling-daisy-chaining/