I guess it should’ve been mentioned in the question Memory is byte addressable. For block size 4B, address 0 will be a miss, hence addresses 0-3 will be brought into cache. So only 2 would be a hit and rest of the addresses will be misses. For block size 8B, 0 will again be a miss and addresses 0-7 will be brought into cache, hence addresses 2,4 will be hits. 16 will be a miss and addresses 16-23 will be brought into cache and 32 will again be a miss. Hence 2 hits out of 6 => 0.33 hitrate.