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Recent activity by jaswanth431
7
answers
1
GATE CSE 2015 Set 1 | Question: 55
The least number of temporary variables required to create a three-address code in static single assignment form for the expression $q + r / 3 + s - t * 5 + u * v/w$ is__________________.
commented
in
Compiler Design
Jan 12, 2022
29.0k
views
gatecse-2015-set1
compiler-design
intermediate-code
normal
numerical-answers
static-single-assignment
5
answers
2
GATE IT 2008 | Question: 42
The two numbers given below are multiplied using the Booth's algorithm. Multiplicand : $0101$ $1010$ $1110$ $1110$ Multiplier: $0111$ $0111$ $1011$ $1101$ How many additions/Subtractions are required for the multiplication of the above two numbers? $6$ $8$ $10$ $12$
commented
in
Digital Logic
Jan 4, 2022
21.6k
views
gateit-2008
digital-logic
booths-algorithm
normal
0
answers
3
Self doubt: what are eigen values of resultant matrix when add two matrices?
if eigen values of matrix A = a,b,c if eigen values of matrix B = x,y,z then is it holds every time that eigen value of A+B = a+x, b+y, c+z ? please give some reference to you answer, thankyou.
asked
in
Linear Algebra
Dec 12, 2021
250
views
engineering-mathematics
eigen-value
linear-algebra
matrix
0
answers
4
Engineering mathematics questions
I feel i am weak in engineering mathematics, that's why I want to solve EM previous year questions of other branches, can someone share any pdf or any link with those questions. I will be helpful for my preparation. Thank you
asked
in
Mathematical Logic
Dec 4, 2021
176
views
engineering-mathematics
2
answers
5
GATE CSE 2015 Set 1 | Question: 17
In one of the pairs of protocols given below , both the protocols can use multiple $\textsf{TCP}$ connections between the same client and the server. Which one is that? $\textsf{HTTP, FTP}$ $\textsf{HTTP, TELNET}$ $\textsf{FTP, SMTP}$ $\textsf{HTTP, SMTP}$
commented
in
Computer Networks
Dec 2, 2021
13.9k
views
gatecse-2015-set1
computer-networks
network-protocols
normal
2
answers
6
#Selfdoubt How L-attributed semantic rules are evaluated? Whether they are evaluated simultaneously during parsing?
asked
in
Compiler Design
Nov 16, 2021
801
views
compiler-design
syntax-directed-translation
4
answers
7
GATE CSE 2013 | Question: 51
The procedure given below is required to find and replace certain characters inside an input character string supplied in array $A$. The characters to be replaced are supplied in array $oldc$, while their respective replacement characters are supplied in array $newc$. ... will be successful in exposing the flaw in this procedure? None $2$ only $3$ and $4$ only $4$ only
commented
in
DS
Nov 4, 2021
5.3k
views
gatecse-2013
data-structures
array
normal
9
answers
8
GATE CSE 2013 | Question: 50
The procedure given below is required to find and replace certain characters inside an input character string supplied in array $A$. The characters to be replaced are supplied in array $oldc$ ... given above, how many test cases will be able to capture the flaw? Only one Only two Only three All four
answered
in
DS
Nov 4, 2021
14.3k
views
gatecse-2013
data-structures
array
normal
7
answers
9
GATE CSE 2010 | Question: 54
Consider a network with $6$ routers $\textbf{R1}$ to $\textbf{R6}$ connected with links having weights as shown in the following diagram. All the routers use the distance vector based routing algorithm to update their routing tables. Each router starts with its ... stabilize, how many links in the network will never be used for carrying any data? $4$ $3$ $2$ $1$
commented
in
Computer Networks
Nov 3, 2021
23.5k
views
gatecse-2010
computer-networks
routing
distance-vector-routing
normal
4
answers
10
GATE CSE 2005 | Question: 9
The following is the Hasse diagram of the poset $\left[\{a,b,c,d,e\},≺\right]$ The poset is : not a lattice a lattice but not a distributive lattice a distributive lattice but not a Boolean algebra a Boolean algebra
commented
in
Set Theory & Algebra
Nov 1, 2021
9.1k
views
gatecse-2005
set-theory&algebra
lattice
normal
0
answers
11
Applied gate testseries: No of abelian groups of order 160 is
Can somebody explain the following question and answer?
asked
in
Set Theory & Algebra
Oct 31, 2021
267
views
4
answers
12
GATE CSE 2014 Set 3 | Question: 47
The value of the integral given below is $\int \limits_0^{\pi} \: x^2 \: \cos x\:dx$ $-2\pi$ $\pi$ $-\pi$ $2\pi$
commented
in
Calculus
Oct 8, 2021
8.1k
views
gatecse-2014-set3
calculus
limits
integration
normal
3
answers
13
GATE CSE 1994 | Question: 1.2
Let $A$ and $B$ be real symmetric matrices of size $n \times n$. Then which one of the following is true? $AA'=I$ $A=A^{-1}$ $AB=BA$ $(AB)'=BA$
commented
in
Linear Algebra
Sep 23, 2021
7.7k
views
gate1994
linear-algebra
normal
matrix
3
answers
14
GATE2019 IN: GA-2
Some students were not involved in the strike. If the above statement is true, which of the following conclusions is/are logically necessary? Some who were involved in the strike were students. No student was involved in the strike. At least one student was involved in the strike. Some who were not involved in the strike were students. $1$ and $2$ $3$ $4$ $2$ and $3$
commented
in
Analytical Aptitude
Sep 22, 2021
2.8k
views
gate2019-in
general-aptitude
analytical-aptitude
statements-follow
8
answers
15
GATE CSE 2014 Set 2 | Question: 47
The product of the non-zero eigenvalues of the matrix is ____ $\begin{pmatrix} 1 & 0 & 0 & 0 & 1 \\ 0 & 1 & 1 & 1 & 0 \\ 0 & 1 & 1 & 1 & 0 \\ 0 & 1 & 1 & 1 & 0 \\ 1 & 0 & 0 & 0 & 1 \end{pmatrix}$
commented
in
Linear Algebra
Sep 20, 2021
37.1k
views
gatecse-2014-set2
linear-algebra
eigen-value
normal
numerical-answers
4
answers
16
GATE CSE 2011 | Question: 33
Consider a finite sequence of random values $X=[x_1,x_2,\dots x_n]$. Let $\mu_x$ be the mean and $\sigma_x$ be the standard deviation of $X$. Let another finite sequence $Y$ of equal length be derived from this as $y_i=a*x_i+b$, where $a$ and $b$ are positive ... $Y$ in $Y$ $\mu_y=a \mu_x + b$ $\sigma_y=a \sigma_x + b$
answered
in
Probability
Sep 16, 2021
8.3k
views
gatecse-2011
probability
random-variable
normal
1
answer
17
How carry and zero flag bits are modified after CMP instruction is executed?
The instruction format is CMP R1, R2. How will the carry and zero flags we be modified after above instruction is executed? Case 1: R1< R2 Carry Flag = 1 Zero Flag = 0 R1= R2 Carry Flag = 0 Zero Flag = 1 R1> R2 ... 0 Zero Flag = 1 R1> R2 Carry Flag = 1 Zero Flag = 0 Which one of the above two cases is correct?
answer selected
in
CO and Architecture
Sep 15, 2021
2.1k
views
machine-instruction
co-and-architecture
branch-conditional-instructions
5
answers
18
GATE CSE 2014 Set 3 | Question: 48
Let $S$ be a sample space and two mutually exclusive events $A$ and $B$ be such that $A \cup B = S$. If $P(.)$ denotes the probability of the event, the maximum value of $P(A)P(B)$ is_____.
answered
in
Probability
Sep 12, 2021
8.8k
views
gatecse-2014-set3
probability
numerical-answers
normal
3
answers
19
GATE CSE 2001 | Question: 22
We wish to construct a $B^+$ tree with fan-out (the number of pointers per node) equal to $3$ for the following set of key values: $80, 50, 10, 70, 30, 100, 90$ Assume that the tree is initially empty and the values are added in the order ... need not be shown. The key values $30$ and $10$ are now deleted from the tree in that order show the tree after each deletion.
answered
in
Databases
Sep 11, 2021
4.8k
views
gatecse-2001
databases
b-tree
normal
descriptive
5
answers
20
GATE CSE 2015 Set 3 | Question: 29
Consider the partial Schedule $S$ involving two transactions $T1$ and $T2$. Only the $\textit{read}$ and the $\textit{write}$ operations have been shown. The $\textit{read}$ operation on data item $P$ ... re-started to ensure transaction atomicity Schedule $S$ is recoverable and can ensure transaction atomicity and nothing else needs to be done
commented
in
Databases
Sep 10, 2021
14.4k
views
gatecse-2015-set3
databases
transaction-and-concurrency
normal
1
answer
21
Number System Representation
Why 1’s and 2’s representation of +ve signed numbers are same as the signed-magnitude-representation of that number, but 1’s and 2’s representation of -ve signed numbers are different than their signed-magnitude-representation. I mean why don’t we apply the same rule of conversion of 1’s or 2’s representation for +ve number also?
answered
in
Digital Logic
Sep 9, 2021
350
views
6
answers
22
GATE CSE 2010 | Question: 20
Which of the following concurrency control protocols ensure both conflict serializability and freedom from deadlock? $2$-phase locking Time-stamp ordering I only II only Both I and II Neither I nor II
comment edited
in
Databases
Sep 9, 2021
22.6k
views
gatecse-2010
databases
transaction-and-concurrency
normal
3
answers
23
GATE CSE 2010 | Question: 33
A $5-$stage pipelined processor has Instruction Fetch (IF), Instruction Decode (ID), Operand Fetch (OF), Perform Operation (PO) and Write Operand (WO) stages. The IF, ID, OF and WO stages take $1$ clock cycle each for any instruction. The PO stage takes $1$ clock cycle for ... $13$ $15$ $17$ $19$
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in
CO and Architecture
Sep 8, 2021
22.1k
views
gatecse-2010
co-and-architecture
pipelining
normal
1
answer
24
Structure of control word in control memory
What is the structure of control word for Horizantal microprogrammed control unit? <Conditional branch bit, flag bits, contol field, next address> OR <log(Conditional branch bits), log(flag bits), contol field, next address>
answer selected
in
CO and Architecture
Sep 8, 2021
630
views
control-unit
horizontal-microprogramming
co-and-architecture
9
answers
25
GATE IT 2008 | Question: 39
Consider a CPU where all the instructions require $7$ clock cycles to complete execution. There are $140$ instructions in the instruction set. It is found that $125$ control signals are needed to be generated by the control unit. While designing the horizontal ... size of the control word and control address register? $125, 7$ $125, 10$ $135, 9$ $135, 10$
commented
in
CO and Architecture
Sep 7, 2021
17.7k
views
gateit-2008
co-and-architecture
microprogramming
normal
6
answers
26
GATE CSE 1996 | Question: 2.25
A micro program control unit is required to generate a total of $25$ control signals. Assume that during any micro instruction, at most two control signals are active. Minimum number of bits required in the control word to generate the required control signals will be: $2$ $2.5$ $10$ $12$
answered
in
CO and Architecture
Sep 7, 2021
24.7k
views
gate1996
co-and-architecture
microprogramming
normal
3
answers
27
GATE CSE 1987 | Question: 4a
Find out the width of the control memory of a horizontal microprogrammed control unit, given the following specifications: $16$ control lines for the processor consisting of ALU and $7$ registers. Conditional branching facility by checking $4$ status bits. Provision to hold $128$ words in the control memory.
commented
in
CO and Architecture
Sep 7, 2021
5.7k
views
gate1987
co-and-architecture
microprogramming
descriptive
4
answers
28
GATE CSE 2016 Set 1 | Question: 09
A processor can support a maximum memory of $4\;\textsf{GB}$, where the memory is word-addressable (a word consists of two bytes). The size of address bus of the processor is at least _________bits.
commented
in
CO and Architecture
Sep 7, 2021
12.4k
views
gatecse-2016-set1
co-and-architecture
easy
numerical-answers
memory-interfacing
4
answers
29
GATE CSE 2004 | Question: 64
Consider the following program segment for a hypothetical CPU having three user registers $R_1, R_2$ and $R_3.$ ... }\\\hline \end{array} The total number of clock cycles required to execute the program is $29$ $24$ $23$ $20$
commented
in
CO and Architecture
Sep 5, 2021
19.6k
views
gatecse-2004
co-and-architecture
machine-instruction
normal
4
answers
30
GATE CSE 1994 | Question: 12
Assume that a CPU has only two registers $R_1$ and $R_2$ and that only the following instruction is available $XOR \: R_i, R_j;\{R_j \leftarrow R_i \oplus R_j, \text{ for } i, j =1, 2\}$ Using this XOR instruction, find an instruction sequence in ... and $R_2$ The line p of the circuit shown in figure has stuck at $1$ fault. Determine an input test to detect the fault.
answer reshown
in
CO and Architecture
Sep 5, 2021
3.8k
views
gate1994
co-and-architecture
machine-instruction
normal
descriptive
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