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Recent questions tagged morris-mano
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91
Morris Mano Edition 3 Exercise 5 Question 31 (Page No. 200)
specify the size of a ROM ( Number of words and number of bits per words) that will accommodate the truth table for the following combinational circuit components: A binary multiplexer that multiplies two 4-bit numbers. A 4- ... to-1 line multiplexer with common select and enable inputs. A BCD-to-seven-segment decoder with an enable input.
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rom
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92
Morris Mano Edition 3 Exercise 5 Question 30 (Page No. 200)
A ROM chip of 4096 $\times$ 8 bits has two enable inputs and operates from a 5-volt power supply. How many pins are needed for the integrated-circuit package? draw a block diagram and label all the input and output terminals in the ROM
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93
Morris Mano Edition 3 Exercise 5 Question 29 (Page No. 200)
given a $32 \times 8 $ ROM chip with the enable input, show the external connection which is necessary to construct a $128 \times 8$ ROM with 4 chips and a Decoder.
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Digital Logic
Apr 3, 2019
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digital-logic
morris-mano
combinational-circuit
rom
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94
Morris Mano Edition 3 Exercise 5 Question 28 (Page No. 200)
Implement the following boolean function with $4 \times 1$ multiplexer and external gates, connect A and B to selection lines. The input requirement for the four lines will be a function of C and D. These values are obtained by expressing F as a function ... be implemented with the external gates. $F(A,B,C,D) = \sum(1,3,4,11,12,13,14,15)$
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Digital Logic
Apr 3, 2019
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95
Morris Mano Edition 3 Exercise 5 Question 27 (Page No. 200)
An $8 \times 1$ multiplexer has inputs A,B and C connected to the selection inputs $s _2,s _1$ and $s _0$ respectively.The data inputs $I _0$ through $I _7$ are as follows: $I _1 = I _2 = I _7 = 0$; $ I _3 = I _5 = 1$; $ I _0 = I _4 = D$; and $I _6 = D’$.Determine the boolean function that the multiplexer implements.
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Digital Logic
Apr 3, 2019
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ajaysoni1924
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digital-logic
morris-mano
combinational-circuit
multiplexer
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96
Morris Mano Edition 3 Exercise 5 Question 26 (Page No. 200)
Implement the boolean function $F(A,B,C,D) = \sum(0,1,3,4,8,9,15)$ with an $8 \times 1$multiplexer, but with inputs A,B and C connected to selection inputs $s _2,s _1$ and $s _0$ respectively.
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Apr 3, 2019
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ajaysoni1924
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digital-logic
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combinational-circuit
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97
Morris Mano Edition 3 Exercise 5 Question 25 (Page No. 200)
Implement a Full adder with two $4 \times 1$ multiplexers.
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Apr 3, 2019
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193
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digital-logic
morris-mano
combinational-circuit
multiplexer
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98
Morris Mano Edition 3 Exercise 5 Question 24 (Page No. 200)
implement the following boolean function with an $8 \times 1$ multiplexer. $F(A,B,C,D) = \sum(0,3,5,6,8,9,14,15)$
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Apr 3, 2019
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138
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99
Morris Mano Edition 3 Exercise 5 Question 23 (Page No. 200)
Construct a $16 \times 1$ multiplexer with two $8 \times 1$ and one $ 2 \times 1$ multiplexers.use the block diagram for the three multiplexers.
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Apr 3, 2019
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multiplexer
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100
Morris Mano Edition 3 Exercise 5 Question 22 (Page No. 200)
Draw the logic diagram of a dual 4-to-1 line multiplexer with common selection inputs and a common enable input.
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Apr 3, 2019
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ajaysoni1924
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digital-logic
morris-mano
combinational-circuit
multiplexer
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101
Morris Mano Edition 3 Exercise 5 Question 21 (Page No. 200)
specify the truth table of an Octal-to-binary priority encoder. Provide an output V to indicate that at least one of the input is 1. The input with the highest subscript number has the highest priority. What will be the value of the four outputs if input $D _3$ and $D _5$ are 1 and the other inputs are all )’s?
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Apr 3, 2019
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ajaysoni1924
427
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digital-logic
morris-mano
combinational-circuit
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102
Morris Mano Edition 3 Exercise 5 Question 20 (Page No. 199)
Design a 4-input priority encoder with inputs as given in the tables, but with the input $D _0$ having the highest priority and the input $D _3$ have the lowest priority .
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Digital Logic
Apr 3, 2019
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ajaysoni1924
389
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digital-logic
morris-mano
combinational-circuit
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103
Morris Mano Edition 3 Exercise 5 Question 19 (Page No. 199)
Rearrange the truth table for the circuit in the figure and verify it can function as demultiplexerr.
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Apr 3, 2019
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104
Morris Mano Edition 3 Exercise 5 Question 18 (Page No. 199)
Construct a $5 \times 32 $ decoder with four $3\times8$ decoders with enable and one $ 2 \times 4$ decoder. use a block diagram also.
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Apr 3, 2019
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487
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digital-logic
morris-mano
combinational-circuit
decoder
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105
Morris Mano Edition 3 Exercise 5 Question 17 (Page No. 199)
Draw the logic diagram of a 2-to-4 line decoder with only NOR gates. Include an Enable input.
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Apr 3, 2019
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322
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digital-logic
morris-mano
combinational-circuit
decoder
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106
Morris Mano Edition 3 Exercise 5 Question 16 (Page No. 199)
A combinational circuit is specified by the following three boolean functions. implement the circuit with $3 \times 8$ decoder constructed with NAND gates and three external NAND or AND gates. Use a block diagram for the decoder. Minimize the number of input in the external gates. ... $F _3(A,B,C) = \sum(0,2,3,4,7)$
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Apr 3, 2019
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353
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digital-logic
morris-mano
combinational-circuit
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107
Morris Mano Edition 3 Exercise 5 Question 15 (Page No. 199)
A combinational circuit is defined by the following three boolean functions. Design a circuit with a decoder and External Gate. F1 = x’y’z’ + xz F2 = xy’z’ + x’y F3 = x’y’z + xy
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Apr 3, 2019
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554
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digital-logic
morris-mano
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108
Morris Mano Edition 3 Exercise 5 Question 14 (Page No. 199)
Design a BCD to Decimal decoder using the unused combinations of the BCD code as don’t care conditions.
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Apr 3, 2019
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ajaysoni1924
170
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digital-logic
morris-mano
combinational-circuit
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109
Morris Mano Edition 3 Exercise 5 Question 13 (Page No. 199)
Design a combinational circuit that compares two 4-bit numbers A and B to check if they are equal. the Circuit has one output x, so that when x = 1 if A = B and x = 0 if A and B is not equal.
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Apr 3, 2019
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ajaysoni1924
212
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digital-logic
morris-mano
combinational-circuit
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110
Morris Mano Edition 3 Exercise 5 Question 12 (Page No. 199)
It is necessary to design a decimal Adder for two digits represented in Excess-3 code. Show that the correction after adding the two digits with a four-bit binary adder is as follows. The output carry is equal to the carry from ... output carry is 0 then add 1101. construct a four-bit decimal adder using two 4-bit adders and an inverter..
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Apr 3, 2019
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digital-logic
morris-mano
combinational-circuit
adder
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111
Morris Mano Edition 3 Exercise 5 Question 11 (Page No. 198)
Construct a 4-digit BCD adder-subtractor using 4 BCD adders. Use the Block diagram for each component, showing only inputs and outputs.
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Apr 3, 2019
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digital-logic
morris-mano
combinational-circuit
adder
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112
Morris Mano Edition 3 Exercise 5 Question 10 (Page No. 198)
Design a combinational Circuit that generates the 9’s complement of a BCD digit.?
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Apr 3, 2019
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morris-mano
combinational-circuit
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113
Morris Mano Edition 3 Exercise 5 Question 9 (Page No. 198)
How many Unused Combinations are there in BCD adder?
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Apr 3, 2019
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digital-logic
morris-mano
combinational-circuit
adder
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114
Morris Mano Edition 3 Exercise 5 Question 8 (Page No. 198)
Derive the two-level Boolean expression for the output carry $C _5$ shown in the look-ahead carry generator of the figure
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Apr 3, 2019
by
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550
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morris-mano
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adder
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115
Morris Mano Edition 3 Exercise 5 Question 6 (Page No. 198)
Assume that the EXCLUSIVE-OR gate has a propagation delay of 20ns and that the AND and OR gates have a Propagation delay of 10ns. What is the total Propagation delay time in the four-bit adder of the figure given below?
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Apr 3, 2019
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116
Morris Mano Edition 3 Exercise 5 Question 6 (Page No. 198)
(a) Redefine the carry propagate and carry generate as follows: $P _i = A _i + B _ i$ $G _i = A _iB _i$ ... circuit for this IC. [Hint: use the equation substitution method and AND-OR-INVERT funtion given in part (a) for $C _{i+1}$
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Apr 3, 2019
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adder
carry-generator
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117
Morris Mano Edition 3 Exercise 5 Question 5 (Page No. 198)
Using the AND-OR-Invert implementation procedure, show that the output carry in full adder can be expressed as $C _{i+1} = G _i + P _iC _i = (G _i'P _i + G _i'C _i')'$ IC type 74182 is a look-ahead carry generator MSI ... $C _1'$).
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Apr 3, 2019
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combinational-circuit
adder
carry-generator
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118
Morris Mano Edition 3 Exercise 5 Question 4 (Page No. 197)
The adder-subtractor circuit of figure has the following values for mode input M and data inputs A and B. In each case, determine the values of the outputs: $S _ 4 S _3 S _2 S _1$ and $C _5$. M A B 0 0111 0110 0 1000 1001 1 0101 1000 1 0000 1010
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Apr 3, 2019
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adder
digital-circuits
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119
Morris Mano Edition 3 Exercise 5 Question 3 (Page No. 197)
The adder-subtractor of the figure is used to subtract the following unsigned 4-bit number: 0110 – 1001(6 – 9) What are the binary values in the nine inputs of the circuit $?$ what are the binary values of the five outputs of the circuit$?$ Explain How the output is related to the operation of 6 – 9.
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Apr 3, 2019
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120
Morris Mano Edition 3 Exercise 5 Question 2 (Page No. 197)
Construct a BCD-to-Excess-3-code converter with a 4-bit adder.remember that the Excess-3 code digits obtained by adding 3 to the corresponding BCD Digit. what must be done to change the circuit to an excess-3-to-BCD-code converter
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