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Answers by bahirNaik

73 votes

1

GATE CSE 2016 Set 2 | Question: 48
Consider the following two-process synchronization solution. ... synchronization solution. This solution violates mutual exclusion requirement. This solution violates progress requirement. This solution violates bounded wait requirement.

answered in Operating System Feb 13, 2016

14.8k views

1 vote

2

Relation between Intersection and natural inner join on common column
When , then the cost of computing is (A) the same as R S (B) greater the R S (C) less than R S (D) cannot say anything

answered in Databases Jan 25, 2016

1.7k views

8 votes

3

Canonical cover of a set
Consider the following set of functional dependency on the scheme (A, B,C) A-->BC, B-->C, A--> B, AB-->C The canonical cover for this set is: (A) A-->BC and B--> C B. A-->BC and AB--> C C. A--> BC and A--> B D. A--> B and B--> C

answered in Databases Jan 24, 2016

18.0k views

2 votes

4

fork()
main() { printf(" * "); for(i=0;i<n;i++) fork(); printf(" * "); } how many times * is printed??

answered in Operating System Jan 24, 2016

1.7k views

1 vote

5

process-schedule
Consider the 3 processes, P1, P2 and P3 shown in the table. Process Arrival time Time Units Required (arrival time,time required) P1 0 5 P2 1 7 P3 3 4 The completion order of the 3 processes under the policies FCFS and RR2 (round robin scheduling with CPU quantum ... order is P1 P3 P2 can anyone give me proper explanation, i cant understand why in 4-6 part p1 is taking (not p3?).

answered in Operating System Jan 16, 2016

779 views

0 votes

6

Operating System
Disk Access Question

answered in Operating System Jan 15, 2016

293 views

2 votes

7

Pipelining_ques
Consider 5 stage pipeline which allow all instructions except branch instruction. Program contain 30% conditional instructions out of which 75% are branch instruction. Processor stop fetching the following instruction after the branch instruction untill target address is ... perfectly balanced with 20 GHz clock time. The processor is running with rate of ____________ (in MIPS).

answered in CO and Architecture Jan 10, 2016

509 views

9 votes

8

Throughput of the Pipeline
Consider a machine with 10 ns clock and it takes 4 clock cycle per ALU instruction, 5 clock cycle per branch instruction, 6 clock cycle memory instruction. There exists 40% ALU instruction, 20% branch instruction, and 40% memory instruction. What is throughput of pipeline system if overhead is 2 ns? ______________ MIPS (integer value only).

answered in CO and Architecture Jan 9, 2016

10.7k views

3 votes

9

answered in Databases Jan 9, 2016

916 views

1 vote

10

consistency in database

answered in Databases Jan 9, 2016

275 views

3 votes

11

answered in Databases Jan 9, 2016

511 views

0 votes

12

answered in Databases Jan 9, 2016

395 views

9 votes

13

blind writes
Consider the following schedule $S1$. $S_{1}: R_{1}(C) R_{2}(C) W_{1}(A) W_{2}(A) W_{1}(C) R_{1}(B) R_{2}(B) W_{1}(B) W_{1}(D) W_{2}(B) W_{2}(D) R_{1}(F) W_{3}(E) R_{3}(F)$ Let $'X'$ be the number of 'blind-write' operations in the given schedule and $'z'$ be the number of conflict equivalent serial schedules to $S_{1}$. The value of $X*Z$ is_________.

answered in Databases Jan 9, 2016

1.3k views

1 vote

14

Pipeline problem
A 5 stage pipelined processor has instruction fetch (IF), operand fetch (OF). Instruction decode (ID), perform operation (PO) and Write operand (WO) stages. The IF, ID, OF and WO stages takes 1 clock cycle each for any instruction. The PO stage takes ... question is , Here I1 and I2 are dependent , so how can they start without any stall , no operand forwarding is also mentioned.

answered in CO and Architecture Jan 5, 2016

1.5k views

3 votes

15

switching
A sends 2 frames of 1000 bit each to B via switch S.Bandwidth=10Mbps propogation delay over links=5us find time when second packet reaches B completely

answered in Computer Networks Jan 5, 2016

1.3k views

0 votes

16

MadeEasy Test Series: Compiler Design - Parsing
Which is true? a) Recursive Decent Parsers may suffer from infinite loop. b) Every LR grammer is unambiguous. c) Both a & b d) None Doubt: RDP and LL(1) can go in loop if it is not left-factorized and contains left recursion ... unambiguous, left-factorized and left-rec. free grammer. So, how can it go to infinite loop. Answer given was (c).

answered in Compiler Design Jan 4, 2016

1.1k views

1 vote

17

Type of error
The given statement has what type of error ? in /* declare variable */ x;

answered in Compiler Design Jan 4, 2016

329 views

1 vote

18

Sliding Window Protocol
Assume that SWP is designed for a 1mbps point to point link to the moon which has 1 way latency(delay) of 1.25sec Assuming that each frame carry 1KB of data, find 1. number of sequence number required 2. number of bits required to represent sequence number. for 1st question i got ans 306.17, is it accepted or we have to round it as 307 plz clarify

answered in Computer Networks Jan 3, 2016

526 views

1 vote

19

Need discussion link
I need links of discussion made on all subjects till date ..anyone having link,please share it.

answered in Others Jan 3, 2016

337 views

1 vote

20

Chromatic number
What is the chromatic number of Kn - e (complete graph with an edge removed)?

answered in Set Theory & Algebra Jan 2, 2016

1.6k views

10 votes

21

Floating point
The decimal equivalents of $01440000$ a $32$- bit hexadecimal representation of $IEEE$ single-precision floating point number is $1.11 \times 2^{-125}$ $1.88 \times 2^{-125}$ $1.68 \times 2^{-124}$ $1.88 \times 2^{-129}$

answered in Digital Logic Dec 29, 2015

1.5k views

4 votes

22

Subject Topic- Probability
what is positively skewed ,symmetric and negatively skewed distribution?

answered in Probability Dec 29, 2015

963 views

0 votes

23

how many surfaces are required
pls xplain the last line of the qs,"records cannot span 2 records" and what effect does it bring to the problem

answered in Operating System Dec 26, 2015

467 views

3 votes

24

Addressing mode used by PC

answered in CO and Architecture Dec 25, 2015

2.4k views

2 votes

25

Total cycles for executing these Instructions in a Pipelined Architecture

answered in CO and Architecture Dec 23, 2015

635 views

44 votes

26

GATE CSE 2015 Set 2 | Question: 52
$\text{Host A}$ sends a $\text{UDP}$ datagram containing $8880\text{ bytes}$ of user data to $\text{host B}$ over an $\text{Ethernet LAN}.$ Ethernet frames may carry data up to $1500\text{ bytes (i.e. MTU = 1500 bytes)}.$ Size of $\text{UDP}$ ... be the contents of offset field in the last fragment? $6$ and $925$ $6$ and $7400$ $7$ and $1110$ $7$ and $8880$

answered in Computer Networks Dec 22, 2015

25.5k views

6 votes

27

GATE CSE 2015 Set 2 | Question: 41
Consider the following routing table at an IP router: ... $\text{i-b, ii-c, iii-d, iv-e}$ $\text{i-b, ii-c, iii-e, iv-d}$

answered in Computer Networks Dec 21, 2015

14.0k views

25 votes

28

GATE CSE 1999 | Question: 2.5
Given the programming constructs assignment for loops where the loop parameter cannot be changed within the loop if-then-else forward go to arbitrary go to non-recursive procedure call recursive procedure/function call repeat loop, which constructs will you not include in a programming language ... $\text{(vi), (vii), (viii)}$ $\text{(iii), (vii), (viii)}$

answered in Programming in C Dec 14, 2015

12.6k views

–4 votes

29

GATE CSE 1999 | Question: 1.10
Which of the following disk scheduling strategies is likely to give the best throughput? Farthest cylinder next Nearest cylinder next First come first served Elevator algorithm

answered in Operating System Dec 8, 2015

11.1k views

0 votes

30

Dangling else problem
The dangling else problem in the construct If (E) sales S | is (E) S | a can be resolved IN SDTS by (A) Using the associative & precedence of operating & the 'exe' munch principle (B) By change the grammar to an unambiguous one (C) Cannot be removed as it Is undecidable (D) None of the above

answered in Compiler Design Dec 6, 2015

2.3k views

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