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Recent questions tagged test-series
0
votes
1
answer
271
GateForum
Can anyone please explain
nag.swarna
asked
in
Algorithms
Nov 4, 2018
by
nag.swarna
568
views
algorithms
radix-sort
test-series
0
votes
0
answers
272
test series
A 5-stage pipelined processor has Instruction Fetch (IF), Instruction Decode (ID), Operand Fetch (OF), Perform Operation (PO) and Write Operand (WO) stages. The IF, ID, OF and WO stages take 1 clock cycle each for any instruction. The PO stage ... above sequence of instructions? my answer comes 16 cycle please tell where i did wrong but answer given is 17 please elaborate with figure
Anshu Singh Suryavan
asked
in
CO and Architecture
Nov 3, 2018
by
Anshu Singh Suryavan
344
views
co-and-architecture
pipelining
test-series
numerical-answers
0
votes
1
answer
273
Test Series
according to me S2 should be correct. But answer given as none of them is correct. Please clear the doubt.
Ananya Jaiswal 1
asked
in
Theory of Computation
Nov 1, 2018
by
Ananya Jaiswal 1
439
views
test-series
theory-of-computation
0
votes
0
answers
274
Gateforum Test Series
The answer is C. Please Explain.
Gupta731
asked
in
Databases
Nov 1, 2018
by
Gupta731
401
views
databases
test-series
0
votes
0
answers
275
Test Series
Gupta731
asked
in
CO and Architecture
Oct 31, 2018
by
Gupta731
166
views
test-series
co-and-architecture
0
votes
1
answer
276
Test Series
A two-word instruction "JMP 65" is located from the address 200010. What is the effective address computed if the instruction follows relative addressing mode? My answer is 2065, Why should it be 2067
Gupta731
asked
in
CO and Architecture
Oct 31, 2018
by
Gupta731
320
views
co-and-architecture
addressing-modes
test-series
numerical-answers
0
votes
1
answer
277
Test Series
Though n is finite, how we will compare a and c. My answer is D, but C is provided as the answer.
Gupta731
asked
in
Theory of Computation
Oct 31, 2018
by
Gupta731
263
views
test-series
theory-of-computation
0
votes
0
answers
278
#ME Test series
himgta
asked
in
Programming in C
Oct 30, 2018
by
himgta
459
views
test-series
1
vote
1
answer
279
test series
Consider an empty binary search tree of height $-1.$We need to fill the following sequence of numbers in it $: 11, 12, 13, 14, 15, 16, 17.$The number of ways in which the numbers can be inserted in an empty binary search tree, such that the resulting tree has height $6,$ is _____________ $A)2$ $B)4$ $C)32$ $D)64$
mitesh kumar
asked
in
Programming in C
Oct 28, 2018
by
mitesh kumar
1.8k
views
data-structures
binary-search-tree
test-series
0
votes
0
answers
280
Please explain this concept.
Markzuck
asked
in
CO and Architecture
Oct 26, 2018
by
Markzuck
200
views
co-and-architecture
memory-interfacing
test-series
1
vote
1
answer
281
Advance test algorithms
Is there Any short cut to do these questions fast ?
Prince Sindhiya
asked
in
Algorithms
Oct 23, 2018
by
Prince Sindhiya
618
views
time-complexity
test-series
3
votes
1
answer
282
Advance test algorithms
Prince Sindhiya
asked
in
Algorithms
Oct 23, 2018
by
Prince Sindhiya
951
views
algorithms
time-complexity
test-series
1
vote
1
answer
283
Advance test algorithms
Prince Sindhiya
asked
in
Algorithms
Oct 23, 2018
by
Prince Sindhiya
445
views
algorithms
time-complexity
test-series
1
vote
0
answers
284
Advance test algorithms
Prince Sindhiya
asked
in
Algorithms
Oct 23, 2018
by
Prince Sindhiya
386
views
algorithms
test-series
time-complexity
1
vote
1
answer
285
test algorithms
i marked option a) answer is b)
Prince Sindhiya
asked
in
Algorithms
Oct 20, 2018
by
Prince Sindhiya
242
views
algorithms
time-complexity
test-series
0
votes
0
answers
286
Regarding My Gate preparation and how to get into top 100 rank from this situation
I am sitting at home and preparing.Started in month of September.I have been taken test series of X popular institute.I have answered 2 part subject tests of toc and scored around 41% in the first one and 30% ... years Gate with no preparation at all.I am general.Please suggest me strategy to get the best from here.
sripo
asked
in
GATE
Oct 16, 2018
by
sripo
842
views
gate-preparation
iisc
test-series
iit
0
votes
1
answer
287
Test_CO1_Q35
Assume branch instruction occurs 15% of the time and are predicted as not taken, while in practice they are taken 40% of the time with a penalty of 3 cycles. With forwarding, the load delay slot is one cycle and can be filled 60% if the time with useful instructions, 20% of the ... What is the new CPI due to load delay slots and branch hazards? A. 1.204 B. 1.404 C. 2.204 D. 4.404
BOB
asked
in
CO and Architecture
Oct 15, 2018
by
BOB
262
views
co-and-architecture
pipelining
operand-forwarding
branch-conditional-instructions
test-series
0
votes
1
answer
288
Test_CO1_Q34
Consider a device that is to transfer data at a rate of 1 Mbytes/sec in 16bytes chunks. The overhead of polling is 400 cycles on 500 Mhz processor. Calculate the overhead of polling assuming I/O uses polling mechanism to transfer data? A. 5% B. 8% C. 6% D.4%
BOB
asked
in
CO and Architecture
Oct 15, 2018
by
BOB
323
views
co-and-architecture
disk
polling
test-series
0
votes
1
answer
289
test series co
r1 ← r2 − r3 M[r1 + 100] ← r2 how many RBW AND WBW DEPENDENCY???
eyeamgj
asked
in
CO and Architecture
Oct 15, 2018
by
eyeamgj
319
views
co-and-architecture
data-hazards
numerical-answers
test-series
1
vote
1
answer
290
Test_CD1_Q51
Construct the LALR(1) sets of items for the grammar: S’ -> S S -> *SS | a Then, identify, in the list below, one of the LALR(1) sets of items for (A) [S -> a., $\$] (B) [S -> a., +a] (C) [S -> *SS., $\$ + a] (D) [S -> *SS., $\$]
BOB
asked
in
Compiler Design
Oct 13, 2018
by
BOB
1.7k
views
compiler-design
parsing
test-series
0
votes
0
answers
291
Logic Gates
Which of the following statements is/are Correct ? A. AND and NOT gate are not necessary but sufficient for realization of any Logic function. B. OR and NOT gate are not necessary but sufficient for realization of any Logic function. C. NOR gates are necessary and sufficient for realization of any logic function. D. Both (a) and (b)
Na462
asked
in
Digital Logic
Oct 12, 2018
by
Na462
647
views
digital-logic
test-series
1
vote
0
answers
292
Test zeal
Prince Sindhiya
asked
in
Operating System
Oct 11, 2018
by
Prince Sindhiya
232
views
test-series
zeal
operating-system
0
votes
0
answers
293
Testseries zeal mock
In these question i am getting 48 ,my doubt Is that ,in the question context switching overhead is 1 unit so in Gant chart , i have taken the overhead 1 unit when P2 finishes it's io at 44 unit , please tell me that is it required to consider the context switching time here just see it
Prince Sindhiya
asked
in
Operating System
Oct 11, 2018
by
Prince Sindhiya
266
views
test-series
zeal
1
vote
2
answers
294
CO TEST
garimanand
asked
in
CO and Architecture
Oct 8, 2018
by
garimanand
397
views
co-and-architecture
cache-memory
numerical-answers
test-series
0
votes
1
answer
295
L attributed grammer
I know that every S attributed grammar is L attributed but not vice versa. Can anybody give example of the case if i print the semantic rules using L attributed the result will be different from the S attributed evaluation ? And how should i print the rules in both cases. Explain both case in this example :
Na462
asked
in
Compiler Design
Oct 8, 2018
by
Na462
1.1k
views
compiler-design
syntax-directed-translation
grammar
test-series
0
votes
0
answers
296
Digital topic test
Prince Sindhiya
asked
in
Digital Logic
Oct 7, 2018
by
Prince Sindhiya
204
views
digital-logic
test-series
1
vote
0
answers
297
Digital topic test
I am confused between option B) and D)
Prince Sindhiya
asked
in
Digital Logic
Oct 7, 2018
by
Prince Sindhiya
319
views
digital-logic
test-series
sequential-circuit
0
votes
1
answer
298
Digital topic test
Please explain it i am not understanding the working of it .
Prince Sindhiya
asked
in
Digital Logic
Oct 7, 2018
by
Prince Sindhiya
467
views
digital-logic
test-series
1
vote
1
answer
299
zeal test digital logic
i marked the option b) but i didn't understand the solution
Prince Sindhiya
asked
in
Digital Logic
Oct 6, 2018
by
Prince Sindhiya
513
views
test-series
2
votes
0
answers
300
zeal test digital logic
what is difference between synchronous counter and ripple counter ?
Prince Sindhiya
asked
in
Digital Logic
Oct 6, 2018
by
Prince Sindhiya
530
views
test-series
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